[LinuxBIOS] Support for recent chipset and powerful desktop CPU
stuge-linuxbios at cdy.org
Thu Nov 30 09:40:21 CET 2006
On Thu, Nov 30, 2006 at 05:16:52AM +0100, Segher Boessenkool wrote:
> > The USB debug capability is supposed to work even when almost
> > nothing is work.
> EHCI debug port requires PCI to be set up (at least
> partially) -- it requires a BAR.
Am I correct in understanding that this is about the same amount
of work as is needed to reach the serial port super IO chips?
The BAR is just an address at which the controller will listen -
right - or does it have to be backed by system RAM?
Indeed PCI accesses must be seen by the controller for it to matter
in the first place.
(Did my other message about abusing buses come through?)
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