[LinuxBIOS] Support for recent chipset and powerful desktop CPU
segher at kernel.crashing.org
Thu Nov 30 18:22:10 CET 2006
>>> The USB debug capability is supposed to work even when almost
>>> nothing is work.
>> EHCI debug port requires PCI to be set up (at least
>> partially) -- it requires a BAR.
> Am I correct in understanding that this is about the same amount
> of work as is needed to reach the serial port super IO chips?
No, it's more work.
> The BAR is just an address at which the controller will listen -
> - or does it have to be backed by system RAM?
You typically need to set up quite a bit of the PCI subsystem
for it to work -- including not only bridges and devices on
the path to the PCI function you're interested in, but also
any siblings of any such. And you need to do some work with
the north bridge typically (open up some window there).
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