[LinuxBIOS] Configuring PCI devices
Ed Swierk
eswierk at arastra.com
Thu Oct 5 21:00:42 CEST 2006
I'm working on porting LinuxBIOS to an AM2+MCP55-based mainboard (DFI
LANParty UT NF590) using the latest AMD Rev F and MCP55 southbridge
code from svn.
I replaced most of the CK804 PCI device IDs with their MCP55
counterparts, and put the following in my mainboard Config.lb:
chip northbridge/amd/amdk8/root_complex
device apic_cluster 0 on
chip cpu/amd/socket_AM2
device apic 0 on end
end
end
device pci_domain 0 on
chip northbridge/amd/amdk8 #mc0
device pci 18.0 on # northbridge
# devices on link 0, link 0 == LDT 0
chip southbridge/nvidia/ck804
device pci a.0 on end
device pci a.1 on end
device pci c.0 on end
end
end # device pci 18.0
device pci 18.0 on end # Link 1
device pci 18.0 on end # Link 2
device pci 18.1 on end
device pci 18.2 on end
device pci 18.3 on end
end #mc0
end # pci_domain
end # root_complex
Obviously this is not quite right, since I get the following output during boot:
Jumping to LinuxBIOS.
LinuxBIOS-2.0.0-FILO Thu Oct 5 11:34:43 PDT 2006 booting...
Enumerating buses...
APIC_CLUSTER: 0 enabled
PCI_DOMAIN: 0000 enabled
PCI: 00:18.3 siblings=1
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
PCI: pci_scan_bus for bus 00
PCI: 00:18.0 [1022/1100] enabled
PCI: 00:18.1 [1022/1101] enabled
PCI: 00:18.2 [1022/1102] enabled
PCI: 00:18.3 [1022/1103] enabled
PCI: 00:1e.0 [10de/0369] enabled
PCI: 00:1f.0 [10de/0360] enabled
PCI: 00:1f.1 [10de/0368] enabled
PCI: 00:1f.2 [10de/036a] enabled
Disabling static device: PCI: 00:0a.0
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [10de/036c] enabled
PCI: 00:00.1 [10de/036d] enabled
PCI: 00:0a.0
PCI: 00:0a.1
PCI: 00:0c.0
PCI: Left over static devices. Check your Config.lb
I'm pretty fuzzy on what exactly belongs in the device/chip section of
the Config.lb, and how this affects the PCI device enumeration during
boot (e.g. how did device 10de:036c get mapped to 00:00.0?). Is there
a document that explains this?
I've attached the output of lspci (using the factory BIOS), as well as
my modified pci_ids.h and cache_as_ram_auto.c.
Any pointers would be appreciated.
--Ed
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00:00.0 RAM memory: nVidia Corporation C51 Host Bridge (rev a2)
00:00.1 RAM memory: nVidia Corporation C51 Memory Controller 0 (rev a2)
00:00.2 RAM memory: nVidia Corporation C51 Memory Controller 1 (rev a2)
00:00.3 RAM memory: nVidia Corporation C51 Memory Controller 5 (rev a2)
00:00.4 RAM memory: nVidia Corporation C51 Memory Controller 4 (rev a2)
00:00.5 RAM memory: nVidia Corporation C51 Host Bridge (rev a2)
00:00.6 RAM memory: nVidia Corporation C51 Memory Controller 3 (rev a2)
00:00.7 RAM memory: nVidia Corporation C51 Memory Controller 2 (rev a2)
00:04.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1)
00:08.0 RAM memory: nVidia Corporation MCP55 Memory Controller (rev a1)
00:09.0 ISA bridge: nVidia Corporation MCP55 LPC Bridge (rev a2)
00:09.1 SMBus: nVidia Corporation MCP55 SMBus (rev a2)
00:09.2 RAM memory: nVidia Corporation MCP55 Memory Controller (rev a2)
00:0a.0 USB Controller: nVidia Corporation MCP55 USB Controller (rev a1)
00:0a.1 USB Controller: nVidia Corporation MCP55 USB Controller (rev a2)
00:0c.0 IDE interface: nVidia Corporation MCP55 IDE (rev a1)
00:0d.0 IDE interface: nVidia Corporation MCP55 SATA Controller (rev a2)
00:0d.1 IDE interface: nVidia Corporation MCP55 SATA Controller (rev a2)
00:0d.2 IDE interface: nVidia Corporation MCP55 SATA Controller (rev a2)
00:0e.0 PCI bridge: nVidia Corporation MCP55 PCI bridge (rev a2)
00:0e.1 Audio device: nVidia Corporation MCP55 High Definition Audio (rev a2)
00:10.0 Bridge: nVidia Corporation MCP55 Ethernet (rev a2)
00:11.0 Bridge: nVidia Corporation MCP55 Ethernet (rev a2)
00:12.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2)
00:13.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2)
00:15.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2)
00:16.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2)
00:17.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2)
00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration
00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map
00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller
00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control
01:00.0 VGA compatible controller: nVidia Corporation NV44 [GeForce 6200 LE] (rev a1)
02:09.0 FireWire (IEEE 1394): VIA Technologies, Inc. IEEE 1394 Host Controller (rev 80)
04:00.0 RAID bus controller: Silicon Image, Inc. SiI 3132 Serial ATA Raid II Controller (rev 01)
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00:00.0 0500: 10de:02f4 (rev a2)
00:00.1 0500: 10de:02fa (rev a2)
00:00.2 0500: 10de:02fe (rev a2)
00:00.3 0500: 10de:02f8 (rev a2)
00:00.4 0500: 10de:02f9 (rev a2)
00:00.5 0500: 10de:02ff (rev a2)
00:00.6 0500: 10de:027f (rev a2)
00:00.7 0500: 10de:027e (rev a2)
00:04.0 0604: 10de:02fb (rev a1)
00:08.0 0500: 10de:0369 (rev a1)
00:09.0 0601: 10de:0360 (rev a2)
00:09.1 0c05: 10de:0368 (rev a2)
00:09.2 0500: 10de:036a (rev a2)
00:0a.0 0c03: 10de:036c (rev a1)
00:0a.1 0c03: 10de:036d (rev a2)
00:0c.0 0101: 10de:036e (rev a1)
00:0d.0 0101: 10de:037f (rev a2)
00:0d.1 0101: 10de:037f (rev a2)
00:0d.2 0101: 10de:037f (rev a2)
00:0e.0 0604: 10de:0370 (rev a2)
00:0e.1 0403: 10de:0371 (rev a2)
00:10.0 0680: 10de:0373 (rev a2)
00:11.0 0680: 10de:0373 (rev a2)
00:12.0 0604: 10de:0376 (rev a2)
00:13.0 0604: 10de:0374 (rev a2)
00:15.0 0604: 10de:0378 (rev a2)
00:16.0 0604: 10de:0375 (rev a2)
00:17.0 0604: 10de:0377 (rev a2)
00:18.0 0600: 1022:1100
00:18.1 0600: 1022:1101
00:18.2 0600: 1022:1102
00:18.3 0600: 1022:1103
01:00.0 0300: 10de:0163 (rev a1)
02:09.0 0c00: 1106:3044 (rev 80)
04:00.0 0104: 1095:3132 (rev 01)
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-[0000:00]-+-00.0 nVidia Corporation C51 Host Bridge
+-00.1 nVidia Corporation C51 Memory Controller 0
+-00.2 nVidia Corporation C51 Memory Controller 1
+-00.3 nVidia Corporation C51 Memory Controller 5
+-00.4 nVidia Corporation C51 Memory Controller 4
+-00.5 nVidia Corporation C51 Host Bridge
+-00.6 nVidia Corporation C51 Memory Controller 3
+-00.7 nVidia Corporation C51 Memory Controller 2
+-04.0-[0000:01]----00.0 nVidia Corporation NV44 [GeForce 6200 LE]
+-08.0 nVidia Corporation MCP55 Memory Controller
+-09.0 nVidia Corporation MCP55 LPC Bridge
+-09.1 nVidia Corporation MCP55 SMBus
+-09.2 nVidia Corporation MCP55 Memory Controller
+-0a.0 nVidia Corporation MCP55 USB Controller
+-0a.1 nVidia Corporation MCP55 USB Controller
+-0c.0 nVidia Corporation MCP55 IDE
+-0d.0 nVidia Corporation MCP55 SATA Controller
+-0d.1 nVidia Corporation MCP55 SATA Controller
+-0d.2 nVidia Corporation MCP55 SATA Controller
+-0e.0-[0000:02]----09.0 VIA Technologies, Inc. IEEE 1394 Host Controller
+-0e.1 nVidia Corporation MCP55 High Definition Audio
+-10.0 nVidia Corporation MCP55 Ethernet
+-11.0 nVidia Corporation MCP55 Ethernet
+-12.0-[0000:03]--
+-13.0-[0000:04]----00.0 Silicon Image, Inc. SiI 3132 Serial ATA Raid II Controller
+-15.0-[0000:05]--
+-16.0-[0000:06]--
+-17.0-[0000:07]--
+-18.0 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration
+-18.1 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map
+-18.2 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller
\-18.3 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control
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