[LinuxBIOS] PATCH: flashrom support for all ICH chipsets.

[Uwe Hermann]

Hi,

I've added support in flashrom for all ICH chipsets (maybe I missed one
or two; if so, please tell me).

Tested on real hardware: ICH2, ICH6-M (the rest is untested).


HTH, Uwe.
-- 
Uwe Hermann 
http://www.hermann-uwe.de
http://www.it-services-uh.de  | http://www.crazy-hacks.org 
http://www.holsham-traders.de | http://www.unmaintained-free-software.org
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Index: util/flashrom/flash_enable.c
===================================================================
--- util/flashrom/flash_enable.c	(Revision 2394)
+++ util/flashrom/flash_enable.c	(Arbeitskopie)
@@ -3,6 +3,7 @@
  *
  *   Copyright (C) 2000-2004 ???
  *   Copyright (C) 2005 coresystems GmbH <stepan at openbios.org>
+ *   Copyright (C) 2006 Uwe Hermann <uwe at hermann-uwe.de>
  *
  *   This program is free software; you can redistribute it and/or
  *   modify it under the terms of the GNU General Public License
@@ -101,20 +102,16 @@
 	return 0;
 }
 
-enum {
-	ICH4_BIOS_CNTL = 0x4e,
-	/* see page 375 of "Intel ICH7 External Design Specification"
-	 * http://download.intel.com/design/chipsets/datashts/30701302.pdf */
-	ICH7_BIOS_CNTL = 0xdc,
-};
 static int enable_flash_ich(struct pci_dev *dev, char *name, int bios_cntl)
 {
 	/* register 4e.b gets or'ed with one */
 	uint8_t old, new;
 	/* if it fails, it fails. There are so many variations of broken mobos
-	 * that it is hard to argue that we should quit at this point. 
-	 */
+	 * that it is hard to argue that we should quit at this point. */
 
+	/* Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, but
+         * just treating it as 8 bit wide seems to work fine in practice. */
+
 	old = pci_read_byte(dev, bios_cntl);
 
 	new = old | 1;
@@ -132,14 +129,14 @@
 	return 0;
 }
 
-static int enable_flash_ich4(struct pci_dev *dev, char *name)
+static int enable_flash_ich_4e(struct pci_dev *dev, char *name)
 {
-	return enable_flash_ich(dev, name, ICH4_BIOS_CNTL);
+	return enable_flash_ich(dev, name, 0x4e);
 }
 
-static int enable_flash_ich7(struct pci_dev *dev, char *name)
+static int enable_flash_ich_dc(struct pci_dev *dev, char *name)
 {
-	return enable_flash_ich(dev, name, ICH7_BIOS_CNTL);
+	return enable_flash_ich(dev, name, 0xdc);
 }
 
 static int enable_flash_vt8235(struct pci_dev *dev, char *name)
@@ -384,10 +381,23 @@
 static FLASH_ENABLE enables[] = {
 	{0x1039, 0x0630, "sis630", enable_flash_sis630},
 	{0x8086, 0x2480, "E7500", enable_flash_e7500},
-	{0x8086, 0x24c0, "ICH4", enable_flash_ich4},
-	{0x8086, 0x24cc, "ICH4-M", enable_flash_ich4},
-	{0x8086, 0x24d0, "ICH5", enable_flash_ich4},
-	{0x8086, 0x27b8, "ICH7", enable_flash_ich7},
+	{0x8086, 0x2410, "ICH", enable_flash_ich_4e},
+	{0x8086, 0x2420, "ICH0", enable_flash_ich_4e},
+	{0x8086, 0x2440, "ICH2", enable_flash_ich_4e},
+	{0x8086, 0x244c, "ICH2-M", enable_flash_ich_4e},
+	{0x8086, 0x2480, "ICH3-S", enable_flash_ich_4e},
+	{0x8086, 0x248c, "ICH3-M", enable_flash_ich_4e},
+	{0x8086, 0x24c0, "ICH4/ICH4-L", enable_flash_ich_4e},
+	{0x8086, 0x24cc, "ICH4-M", enable_flash_ich_4e},
+	{0x8086, 0x24d0, "ICH5/ICH5R", enable_flash_ich_4e},
+	{0x8086, 0x2640, "ICH6/ICH6R", enable_flash_ich_dc},
+	{0x8086, 0x2641, "ICH6-M", enable_flash_ich_dc},
+	{0x8086, 0x27b8, "ICH7/ICH7R", enable_flash_ich_dc},
+	{0x8086, 0x27b9, "ICH7M", enable_flash_ich_dc},
+	{0x8086, 0x27bd, "ICH7MDH", enable_flash_ich_dc},
+	{0x8086, 0x2810, "ICH8/ICH8R", enable_flash_ich_dc},
+	{0x8086, 0x2812, "ICH8DH", enable_flash_ich_dc},
+	{0x8086, 0x2814, "ICH8DO", enable_flash_ich_dc},
 	{0x1106, 0x8231, "VT8231", enable_flash_vt8231},
 	{0x1106, 0x3177, "VT8235", enable_flash_vt8235},
 	{0x1078, 0x0100, "CS5530", enable_flash_cs5530},
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