[LinuxBIOS] On flashrom architecture
rminnich at gmail.com
Sun Apr 29 01:13:52 CEST 2007
On 4/28/07, Stefan Reinauer <stepan at coresystems.de> wrote:
> * Darmawan Salihun <darmawan.salihun at gmail.com> [070428 13:44]:
> > Yes. It's a specific sc520 system which has it's flash mapped to another
> > position. I was a bit uncertain whether to allow flash probing in that
> > area on non-TS5300 systems. Do you have a good idea for a runtime check?
> In fact, the SC520 has three possible flash banks that should be probed,
> instead of the single hard coded one:
> Registers are
> BOOTCS (MMCR offs 0x50), ROMCS1 (MMCR offs 0x54), ROMCS2 (MMCR offs 0x56)
> and one of PAR0-PAR15 (32bit registers at 0x88-0xc4) - The highest 3 bit
> describe the target, 100 is BOOTCS, 101 is ROMCS1, 110 is ROMCS2
> See Élan™ SC520 Microcontroller Register Set Manual
> The Linux MTD mapping driver suggests changing the default mapping of
> those areas for some interesting reasons. We might take the chance to
> unify the ROM mappings on all SC520 boards.
The Elan SC520 is a really interesting design. I don't know how much
longer Elan will be around. For now, I would not put a lot of effort
into cleaning it up -- there is lots of other work to do.
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