[LinuxBIOS] SSE 128 bits in C7

Corey Osgood corey.osgood at gmail.com
Sat Dec 29 11:56:53 CET 2007


Urbez Santana Roma wrote:
> Thanks for answer Rudolf, the CPU can SSE and SSE2, when runs with
> normal BIOS the instruction "movd %eax,%xmm0" works in, but if the
> linuxbios need working with sse and sse2 with a microKernel for
> example, this instruction produces a exception.
>
> My contents of the /proc/cpuinfo says: 
>
> processor       : 0
> vendor_id       : CentaurHauls
> cpu family      : 6
> model           : 10
> model name      : VIA Esther processor 1000MHz
> stepping        : 9
> cpu MHz         : 65535.000
>   

Huh? This is in LB or factory bios?

> cache size      : 128 KB
> fdiv_bug        : no
> hlt_bug         : no
> f00f_bug        : no
> coma_bug        : no
> fpu             : yes
> fpu_exception   : yes
> cpuid level     : 1
> wp              : yes
> flags           : fpu vme de pse tsc msr pae mce sep mtrr pge cmov pat
> clflush acpi mmx fxsr sse sse2 tm up pni est tm2 rng rng_en ace ace_en
> ace2 ace2_en phe phe_en pmm pmm_en
> bogomips        : 1598.31
> clflush size    : 64
>
> The problem is that the BIOS must enable XMM registers or the flags from
> CR4? if not 
> only works MMX registers with SSE and SSE2 integer addons.
>
> And i not known what must this CPU for enable it, or all CPU's.
>
> Lots of thanks if one can help me!.
>   

Hmm, I'm looking at the datasheet right now, and there doesn't seem to
be any MMX control in the CR4 register, however bit 10 is this:
OSXMMEXCPT: OS Unmasked exception support

and it can be set to 1 to enable. This is the only mention of XMM in the
entire datasheet.

Hope this helps,
Corey

> El vie, 28-12-2007 a las 21:24 +0100, Rudolf Marek escribió:
>   
>> Hi,
>>
>> You need to have CPU of model 9.
>>
>> What cat /proc/cpuinfo says?
>>
>> (or apt-get install cpuid; cpuid )
>>
>> Thanks,
>> Rudolf
>>     




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