[LinuxBIOS] new target iei juki-511p/rocky-512
Nikolay Petukhov
nikolaypetukhov at gmail.com
Sat Jun 2 20:20:10 CEST 2007
Hi,
Here's a one patch for IEI JUKI-511P and IEI ROCKY-512 half-size boards.
This boards are little difference, that's why it has one patch.
Linux with patchs from Juergen Beisert
(http://www.linuxbios.org/pipermail/linuxbios/2007-May/020932.html)
boots and work fine(ide, usb, ethernet, serial, keyboard and sound
work normally).
Problems:
Filo load bzImage only from ide0.
Video don't work, no any monitor output.
JUKI-511P – PCISA half–size board:
Specification:
CPU: Geode GX1 300Mhz
System Chipset: cs5530
SuperIO: Winbond w83977f-a
Ethernet: rtl8100B
Memory: one DIMM
AC97: AD1881
ROCKY-512 – ISA half–size board:
Specification:
CPU: Geode GX1 300Mhz
System Chipset: cs5530
SuperIO: Winbond w83977f-a
Ethernet: rtl8100B
Memory: 64MB on board and one DIMM
AC97: no sound chip
Here's also dmesg output.
--
Nikolay
-------------- next part --------------
diff -Nru LinuxBIOSv2-2700/src/mainboard/iei/juki511p/auto.c LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/auto.c
--- LinuxBIOSv2-2700/src/mainboard/iei/juki511p/auto.c 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/auto.c 2007-06-02 20:02:10.000000000 +0600
@@ -0,0 +1,67 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#define ASSEMBLY 1
+
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <arch/io.h>
+#include <device/pnp_def.h>
+#include <arch/romcc_io.h>
+#include <arch/hlt.h>
+#include "pc80/serial.c"
+#include "arch/i386/lib/console.c"
+#include "ram/ramtest.c"
+#include "superio/winbond/w83977fa/w83977fa_early_serial.c"
+#include "cpu/x86/bist.h"
+
+#define SERIAL_DEV PNP_DEV(0x3f0, W83977FA_SP1)
+
+#include "northbridge/amd/gx1/raminit.c"
+
+void udelay(int usecs)
+{
+ int i;
+ for(i = 0; i < usecs; i++)
+ outb(i&0xff, 0x80);
+}
+#include "lib/delay.c"
+
+static void main(unsigned long bist)
+{
+ /* Initialize the serial console. */
+ w83977fa_enable_serial(SERIAL_DEV, TTYS0_BASE);
+
+ uart_init();
+ console_init();
+
+ /* Halt if there was a built in self test failure. */
+ report_bist_failure(bist);
+
+ /* Disable Watchdog Timer. */
+ inb(0x043);
+ inb(0x843);
+
+ /* Initialize RAM. */
+ sdram_init();
+
+ /* Check RAM. */
+ /* ram_check(0x00000000, 640 * 1024); */
+}
diff -Nru LinuxBIOSv2-2700/src/mainboard/iei/juki511p/chip.h LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/chip.h
--- LinuxBIOSv2-2700/src/mainboard/iei/juki511p/chip.h 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/chip.h 2007-06-02 19:06:20.000000000 +0600
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+extern struct chip_operations mainboard_iei_juki511p_ops;
+
+struct mainboard_iei_juki511p_config {
+ int nothing;
+};
diff -Nru LinuxBIOSv2-2700/src/mainboard/iei/juki511p/cmos.layout LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/cmos.layout
--- LinuxBIOSv2-2700/src/mainboard/iei/juki511p/cmos.layout 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/cmos.layout 2007-05-15 13:11:09.000000000 +0600
@@ -0,0 +1,73 @@
+entries
+
+#start-bit length config config-ID name
+#0 8 r 0 seconds
+#8 8 r 0 alarm_seconds
+#16 8 r 0 minutes
+#24 8 r 0 alarm_minutes
+#32 8 r 0 hours
+#40 8 r 0 alarm_hours
+#48 8 r 0 day_of_week
+#56 8 r 0 day_of_month
+#64 8 r 0 month
+#72 8 r 0 year
+#80 4 r 0 rate_select
+#84 3 r 0 REF_Clock
+#87 1 r 0 UIP
+#88 1 r 0 auto_switch_DST
+#89 1 r 0 24_hour_mode
+#90 1 r 0 binary_values_enable
+#91 1 r 0 square-wave_out_enable
+#92 1 r 0 update_finished_enable
+#93 1 r 0 alarm_interrupt_enable
+#94 1 r 0 periodic_interrupt_enable
+#95 1 r 0 disable_clock_updates
+#96 288 r 0 temporary_filler
+0 384 r 0 reserved_memory
+384 1 e 4 boot_option
+385 1 e 4 last_boot
+386 1 e 1 ECC_memory
+388 4 r 0 reboot_bits
+392 3 e 5 baud_rate
+400 1 e 1 power_on_after_fail
+412 4 e 6 debug_level
+416 4 e 7 boot_first
+420 4 e 7 boot_second
+424 4 e 7 boot_third
+428 4 h 0 boot_index
+432 8 h 0 boot_countdown
+1008 16 h 0 check_sum
+
+enumerations
+
+#ID value text
+1 0 Disable
+1 1 Enable
+2 0 Enable
+2 1 Disable
+4 0 Fallback
+4 1 Normal
+5 0 115200
+5 1 57600
+5 2 38400
+5 3 19200
+5 4 9600
+5 5 4800
+5 6 2400
+5 7 1200
+6 6 Notice
+6 7 Info
+6 8 Debug
+6 9 Spew
+7 0 Network
+7 1 HDD
+7 2 Floppy
+7 8 Fallback_Network
+7 9 Fallback_HDD
+7 10 Fallback_Floppy
+#7 3 ROM
+
+checksums
+
+checksum 392 1007 1008
+
diff -Nru LinuxBIOSv2-2700/src/mainboard/iei/juki511p/Config.lb LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/Config.lb
--- LinuxBIOSv2-2700/src/mainboard/iei/juki511p/Config.lb 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/Config.lb 2007-06-02 19:04:47.000000000 +0600
@@ -0,0 +1,165 @@
+##
+## Compute the location and size of where this firmware image
+## (linuxBIOS plus bootloader) will live in the boot rom chip.
+##
+default ROM_SIZE = 256 * 1024
+default ROM_SECTION_SIZE = ROM_SIZE
+default ROM_SECTION_OFFSET = 0
+
+##
+## Compute the start location and size size of
+## The linuxBIOS bootloader.
+##
+default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
+default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
+
+##
+## Compute where this copy of linuxBIOS will start in the boot rom
+##
+default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
+
+##
+## Compute a range of ROM that can cached to speed up linuxBIOS,
+## execution speed.
+##
+## XIP_ROM_SIZE must be a power of 2.
+## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
+##
+default XIP_ROM_SIZE=65536
+default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
+
+##
+## Set all of the defaults for an x86 architecture
+##
+
+arch i386 end
+
+##
+## Build the objects we have code for in this directory.
+##
+
+driver mainboard.o
+
+if HAVE_PIRQ_TABLE object irq_tables.o end
+#object reset.o
+
+##
+## Romcc output
+##
+makerule ./failover.E
+ depends "$(MAINBOARD)/failover.c ./romcc"
+ action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
+end
+
+makerule ./failover.inc
+ depends "$(MAINBOARD)/failover.c ./romcc"
+ action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
+end
+
+makerule ./auto.E
+ depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
+ action "./romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+end
+makerule ./auto.inc
+ depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
+ action "./romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+end
+
+##
+## Build our 16 bit and 32 bit linuxBIOS entry code
+##
+mainboardinit cpu/x86/16bit/entry16.inc
+mainboardinit cpu/x86/32bit/entry32.inc
+ldscript /cpu/x86/16bit/entry16.lds
+ldscript /cpu/x86/32bit/entry32.lds
+
+##
+## Build our reset vector (This is where linuxBIOS is entered)
+##
+mainboardinit cpu/x86/16bit/reset16.inc
+ldscript /cpu/x86/16bit/reset16.lds
+
+### Should this be in the northbridge code?
+mainboardinit arch/i386/lib/cpu_reset.inc
+
+##
+## Include an id string (For safe flashing)
+##
+mainboardinit arch/i386/lib/id.inc
+ldscript /arch/i386/lib/id.lds
+
+###
+### O.k. We aren't just an intermediary anymore!
+###
+
+##
+## Setup RAM
+##
+mainboardinit cpu/x86/fpu/enable_fpu.inc
+mainboardinit cpu/amd/model_gx1/cpu_setup.inc
+mainboardinit cpu/amd/model_gx1/gx_setup.inc
+mainboardinit ./auto.inc
+
+##
+## Include the secondary Configuration files
+##
+#dir /pc80
+#config chip.h
+
+chip northbridge/amd/gx1
+ device pci_domain 0 on
+ device pci 0.0 on end
+ chip southbridge/amd/cs5530
+
+ device pci 12.0 on
+ chip superio/winbond/w83977fa
+ device pnp 3f0.0 on # FDC
+ irq 0x70 = 6
+ end
+ device pnp 3f0.1 on # Parallel Port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ end
+ device pnp 3f0.2 on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ register "com1" = "{115200}"
+ device pnp 3f0.3 on # COM2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ register "com2" = "{115200}"
+ device pnp 3f0.4 on # RTC
+ end
+ device pnp 3f0.5 on # Keyboard
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 0x01 # int 1 for PS/2 keyboard
+ irq 0x72 = 0x0c # int 12 for PS/2 mouse
+ end
+ device pnp 3f0.6 off # IR
+ end
+ device pnp 3f0.7 off # GPIO1
+ end
+ device pnp 3f0.8 off # GPIO
+ end
+ end
+ device pci 12.1 on end # SMI
+ device pci 12.2 on end # IDE
+ device pci 12.3 on end # Audio
+ device pci 12.4 on end # VGA onboard
+
+ end
+
+ device pci 0e.0 on end # ETH0
+ device pci 13.0 on end # USB
+
+ end
+ end
+
+ chip cpu/amd/model_gx1
+ end
+
+end
+
diff -Nru LinuxBIOSv2-2700/src/mainboard/iei/juki511p/failover.c LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/failover.c
--- LinuxBIOSv2-2700/src/mainboard/iei/juki511p/failover.c 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/failover.c 2007-06-02 18:48:33.000000000 +0600
@@ -0,0 +1,53 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#define ASSEMBLY 1
+
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <device/pci_ids.h>
+#include <arch/io.h>
+#include "arch/romcc_io.h"
+#include "pc80/mc146818rtc_early.c"
+
+static unsigned long main(unsigned long bist)
+{
+ /* This is the primary cpu how should I boot? */
+ if (do_normal_boot()) {
+ goto normal_image;
+ }
+ else {
+ goto fallback_image;
+ }
+ normal_image:
+ asm volatile ("jmp __normal_image"
+ : /* outputs */
+ : "a" (bist) /* inputs */
+ : /* clobbers */
+ );
+ cpu_reset:
+ asm volatile ("jmp __cpu_reset"
+ : /* outputs */
+ : "a"(bist) /* inputs */
+ : /* clobbers */
+ );
+ fallback_image:
+ return bist;
+}
diff -Nru LinuxBIOSv2-2700/src/mainboard/iei/juki511p/irq_tables.c LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/irq_tables.c
--- LinuxBIOSv2-2700/src/mainboard/iei/juki511p/irq_tables.c 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/irq_tables.c 2007-06-02 19:49:59.000000000 +0600
@@ -0,0 +1,102 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <arch/pirq_routing.h>
+
+#define IRQ_BITMAP_LINK0 0x0800 /* chipset's INTA# input should be routed to IRQ11 */
+#define IRQ_BITMAP_LINK1 0x0400 /* chipset's INTB# input should be routed to IRQ10 */
+#define IRQ_BITMAP_LINK2 0x0000 /* chipset's INTC# input should be routed to nothing (disabled) */
+#define IRQ_BITMAP_LINK3 0x0000 /* chipset's INTD# input should be routed to nothing (disabled) */
+
+const struct irq_routing_table intel_irq_routing_table = {
+ PIRQ_SIGNATURE, /* u32 signature */
+ PIRQ_VERSION, /* u16 version */
+ 32+16*2, /* There can be total 6 devices on the bus */
+ 0x00, /* Where the interrupt router lies (bus) */
+ (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
+ 0xc00, /* IRQs devoted exclusively to PCI usage */
+ 0x1078, /* Vendor */
+ 0x2, /* Device */
+ 0, /* Crap (miniport) */
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
+ 0x57, /* u8 checksum. This has to be set to some
+ value that would give 0 after the sum of all
+ bytes for this structure (including checksum) */
+
+ .slots = {
+ [0] = {
+ .slot = 0x0, /* should be 0 when it is no real slot. My device is soldered */
+ .bus = 0x00,
+ .devfn = (0x13<<3)|0x0, /* 0x13 is my USB OHCI */
+ .irq = {
+ [0] = { /* <-- 0 means this is INTA# output from the device or slot */
+ .link = 0x01, /* 0x01 means its connected to INTA# input at chipset */
+ .bitmap = IRQ_BITMAP_LINK0
+ },
+ [1] = { /* <-- 1 means this is INTB# output from the device or slot */
+ .link = 0x02, /* 0x02 means its connected to INTB# input at chipset */
+ .bitmap = IRQ_BITMAP_LINK1
+ },
+ [2] = { /* <-- 2 means this is INTC# output from the device or slot */
+ .link = 0x03, /* 0x03 means its connected to INTC# input at chipset */
+ .bitmap = IRQ_BITMAP_LINK2
+ },
+ [3] = { /* <-- 3 means this is INTD# output from the device or slot */
+ .link = 0x04, /* 0x04 means its connected to INTD# input at chipset */
+ .bitmap = IRQ_BITMAP_LINK3
+ }
+ }
+ },
+
+ [1] = {
+ .slot = 0x0, /* means also "on board" */
+ .bus = 0x00,
+ .devfn = (0x0e<<3)|0x0, /* 0x0e is my Realtek Network device */
+ .irq = {
+ [0] = { /* <-- 0 means this is INTA# output from the device or slot */
+ .link = 0x02, /* 0x02 means its connected to INTB# input at chipset */
+ .bitmap = IRQ_BITMAP_LINK1
+ },
+ [1] = { /* <-- 1 means this is INTB# output from the device or slot */
+ .link = 0x03, /* 0x03 means its connected to INTC# input at chipset */
+ .bitmap = IRQ_BITMAP_LINK2
+ },
+ [2] = { /* <-- 2 means this is INTC# output from the device or slot */
+ .link = 0x04, /* 0x04 means its connected to INTD# input at chipset */
+ .bitmap = IRQ_BITMAP_LINK3
+ },
+ [3] = { /* <-- 3 means this is INTD# output from the device or slot */
+ .link = 0x01, /* 0x01 means its connected to INTA# input at chipset */
+ .bitmap = IRQ_BITMAP_LINK0
+ }
+ }
+ }
+ }
+};
+
+/**
+ * Copy the IRQ routing table to memory.
+ *
+ * @param addr Destination address (between 0xF0000...0x100000).
+ * @return The end address of the pirq routing table in memory.
+ **/
+unsigned long write_pirq_routing_table(unsigned long addr)
+{
+ return copy_pirq_routing_table(addr);
+}
diff -Nru LinuxBIOSv2-2700/src/mainboard/iei/juki511p/mainboard.c LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/mainboard.c
--- LinuxBIOSv2-2700/src/mainboard/iei/juki511p/mainboard.c 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/mainboard.c 2007-06-02 19:06:40.000000000 +0600
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <arch/io.h>
+#include "chip.h"
+
+struct chip_operations mainboard_iei_juki511p_ops = {
+ CHIP_NAME("IEI JUKI-511P Mainboard")
+};
diff -Nru LinuxBIOSv2-2700/src/mainboard/iei/juki511p/Options.lb LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/Options.lb
--- LinuxBIOSv2-2700/src/mainboard/iei/juki511p/Options.lb 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/Options.lb 2007-05-31 16:16:37.000000000 +0600
@@ -0,0 +1,147 @@
+uses HAVE_MP_TABLE
+uses HAVE_PIRQ_TABLE
+uses USE_FALLBACK_IMAGE
+uses HAVE_FALLBACK_BOOT
+uses HAVE_HARD_RESET
+uses CONFIG_UDELAY_IO
+uses HAVE_OPTION_TABLE
+uses USE_OPTION_TABLE
+uses CONFIG_COMPRESS
+uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
+uses CONFIG_COMPRESSED_PAYLOAD_LZMA
+uses CONFIG_PRECOMPRESSED_PAYLOAD
+uses CONFIG_ROM_PAYLOAD
+uses IRQ_SLOT_COUNT
+uses MAINBOARD
+uses MAINBOARD_VENDOR
+uses MAINBOARD_PART_NUMBER
+uses LINUXBIOS_EXTRA_VERSION
+uses ARCH
+uses FALLBACK_SIZE
+uses STACK_SIZE
+uses HEAP_SIZE
+uses ROM_SIZE
+uses ROM_SECTION_SIZE
+uses ROM_IMAGE_SIZE
+uses ROM_SECTION_SIZE
+uses ROM_SECTION_OFFSET
+uses CONFIG_ROM_PAYLOAD_START
+uses PAYLOAD_SIZE
+uses _ROMBASE
+uses _RAMBASE
+uses XIP_ROM_SIZE
+uses XIP_ROM_BASE
+uses HAVE_MP_TABLE
+uses CROSS_COMPILE
+uses CC
+uses HOSTCC
+
+uses OBJCOPY
+
+uses CONFIG_CONSOLE_SERIAL8250
+uses DEFAULT_CONSOLE_LOGLEVEL
+uses MAXIMUM_CONSOLE_LOGLEVEL
+
+uses TTYS0_BAUD
+uses TTYS0_BASE
+uses TTYS0_LCS
+
+
+## ROM_SIZE is the size of boot ROM that this board will use.
+default ROM_SIZE = 256*1024
+
+###
+### Build options
+###
+
+##
+## Build code for the fallback boot
+##
+default HAVE_FALLBACK_BOOT=1
+
+##
+## no MP table
+##
+default HAVE_MP_TABLE=0
+
+##
+## Build code to reset the motherboard from linuxBIOS
+##
+default HAVE_HARD_RESET=0
+
+default CONFIG_UDELAY_IO=1
+##
+## Build code to export a programmable irq routing table
+##
+default HAVE_PIRQ_TABLE=0
+default IRQ_SLOT_COUNT=2
+#object irq_tables.o
+
+##
+## Build code to export a CMOS option table
+##
+default HAVE_OPTION_TABLE=0
+
+###
+### LinuxBIOS layout values
+###
+
+## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
+default ROM_IMAGE_SIZE = 65536
+default FALLBACK_SIZE = 131072
+
+##
+## Use a small 8K stack
+##
+default STACK_SIZE=0x2000
+
+##
+## Use a small 16K heap
+##
+default HEAP_SIZE=0x4000
+
+##
+## Only use the option table in a normal image
+##
+#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
+default USE_OPTION_TABLE = 0
+
+default _RAMBASE = 0x00004000
+
+default CONFIG_ROM_PAYLOAD = 1
+
+##
+## The Serial Console
+##
+
+# To Enable the Serial Console
+default CONFIG_CONSOLE_SERIAL8250=1
+default DEFAULT_CONSOLE_LOGLEVEL=8
+default MAXIMUM_CONSOLE_LOGLEVEL=8
+
+## Select the serial console baud rate
+default TTYS0_BAUD=115200
+#default TTYS0_BAUD=57600
+#default TTYS0_BAUD=38400
+#default TTYS0_BAUD=19200
+#default TTYS0_BAUD=9600
+#default TTYS0_BAUD=4800
+#default TTYS0_BAUD=2400
+#default TTYS0_BAUD=1200
+
+# Select the serial console base port
+default TTYS0_BASE=0x3f8
+
+# Select the serial protocol
+# This defaults to 8 data bits, 1 stop bit, and no parity
+default TTYS0_LCS=0x3
+
+##
+## The default compiler
+##
+default CROSS_COMPILE=""
+default CC="$(CROSS_COMPILE)gcc -m32"
+default HOSTCC="gcc"
+
+end
+
diff -Nru LinuxBIOSv2-2700/src/northbridge/amd/gx1/raminit.c LinuxBIOSv2-2700-juki/src/northbridge/amd/gx1/raminit.c
--- LinuxBIOSv2-2700/src/northbridge/amd/gx1/raminit.c 2005-07-06 23:11:02.000000000 +0600
+++ LinuxBIOSv2-2700-juki/src/northbridge/amd/gx1/raminit.c 2007-05-31 16:06:40.000000000 +0600
@@ -324,6 +324,7 @@
outb(0x70, 0x80);
setGX1Mem(GX_BASE + MC_MEM_CNTRL2, 0x000007d8); /* Disable all CLKS, Shift = 3 */
+// setGX1Mem(GX_BASE + MC_MEM_CNTRL1, 0x92080000); /* MD_DS=2, MA_DS=2, CNTL_DS=2 SDCLKRATE=2.5 */
setGX1Mem(GX_BASE + MC_MEM_CNTRL1, 0x92140000); /* MD_DS=2, MA_DS=2, CNTL_DS=2 SDCLKRATE=4 */
setGX1Mem(GX_BASE + MC_BANK_CFG, 0x00700070); /* No DIMMS installed */
setGX1Mem(GX_BASE + MC_SYNC_TIM1, 0x3a733225); /* LTMODE=3, RC=10, RAS=7, RP=3, RCD=3, RRD=2, DPL=2 */
diff -Nru LinuxBIOSv2-2700/src/superio/winbond/w83977fa/chip.h LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/chip.h
--- LinuxBIOSv2-2700/src/superio/winbond/w83977fa/chip.h 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/chip.h 2007-06-02 18:52:57.000000000 +0600
@@ -0,0 +1,9 @@
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+extern struct chip_operations superio_winbond_w83977fa_ops;
+
+struct superio_winbond_w83977fa_config {
+ struct uart8250 com1, com2;
+ struct pc_keyboard keyboard;
+};
diff -Nru LinuxBIOSv2-2700/src/superio/winbond/w83977fa/Config.lb LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/Config.lb
--- LinuxBIOSv2-2700/src/superio/winbond/w83977fa/Config.lb 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/Config.lb 2007-06-02 18:52:28.000000000 +0600
@@ -0,0 +1,2 @@
+config chip.h
+object superio.o
diff -Nru LinuxBIOSv2-2700/src/superio/winbond/w83977fa/superio.c LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/superio.c
--- LinuxBIOSv2-2700/src/superio/winbond/w83977fa/superio.c 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/superio.c 2007-06-02 19:04:17.000000000 +0600
@@ -0,0 +1,122 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov at gmail.com>
+ * Adapted from w83977tf
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <string.h>
+#include <bitops.h>
+#include <uart8250.h>
+#include <pc80/keyboard.h>
+#include "chip.h"
+#include "w83977fa.h"
+
+static void w83977fa_enter_ext_func_mode(device_t dev)
+{
+ outb(0x87, dev->path.u.pnp.port);
+ outb(0x87, dev->path.u.pnp.port);
+}
+static void w83977fa_exit_ext_func_mode(device_t dev)
+{
+ outb(0xaa, dev->path.u.pnp.port);
+}
+
+static void w83977fa_init(device_t dev)
+{
+ struct superio_winbond_w83977fa_config *conf;
+ struct resource *res0, *res1;
+ /* Wishlist handle well known programming interfaces more
+ * generically.
+ */
+ if (!dev->enabled) {
+ return;
+ }
+ conf = dev->chip_info;
+ switch(dev->path.u.pnp.device) {
+ case W83977FA_SP1:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ init_uart8250(res0->base, &conf->com1);
+ break;
+ case W83977FA_SP2:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ init_uart8250(res0->base, &conf->com2);
+ break;
+ case W83977FA_KBC:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ res1 = find_resource(dev, PNP_IDX_IO1);
+ init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+ break;
+ }
+}
+
+static void w83977fa_set_resources(device_t dev)
+{
+ w83977fa_enter_ext_func_mode(dev);
+ pnp_set_resources(dev);
+ w83977fa_exit_ext_func_mode(dev);
+}
+
+static void w83977fa_enable_resources(device_t dev)
+{
+ w83977fa_enter_ext_func_mode(dev);
+ pnp_enable_resources(dev);
+ w83977fa_exit_ext_func_mode(dev);
+}
+
+static void w83977fa_enable(device_t dev)
+{
+ w83977fa_enter_ext_func_mode(dev);
+ pnp_enable(dev);
+ w83977fa_exit_ext_func_mode(dev);
+}
+
+
+static struct device_operations ops = {
+ .read_resources = pnp_read_resources,
+ .set_resources = w83977fa_set_resources,
+ .enable_resources = w83977fa_enable_resources,
+ .enable = w83977fa_enable,
+ .init = w83977fa_init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, W83977FA_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+ { &ops, W83977FA_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+ { &ops, W83977FA_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, W83977FA_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, W83977FA_RTC },
+ { &ops, W83977FA_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
+ { &ops, W83977FA_IR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, W83977FA_GPIO1 },
+ { &ops, W83977FA_GPIO2 },
+};
+
+static void enable_dev(device_t dev)
+{
+ pnp_enable_devices(dev, &ops,
+ sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_winbond_w83977fa_ops = {
+ CHIP_NAME("Winbond W83977F-A Super I/O")
+ .enable_dev = enable_dev,
+};
diff -Nru LinuxBIOSv2-2700/src/superio/winbond/w83977fa/w83977fa_early_serial.c LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/w83977fa_early_serial.c
--- LinuxBIOSv2-2700/src/superio/winbond/w83977fa/w83977fa_early_serial.c 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/w83977fa_early_serial.c 2007-06-02 19:03:33.000000000 +0600
@@ -0,0 +1,25 @@
+#include <arch/romcc_io.h>
+#include "w83977fa.h"
+
+static inline void pnp_enter_ext_func_mode(device_t dev)
+{
+ unsigned int port = dev >> 8;
+ outb(0x87, port);
+ outb(0x87, port);
+}
+
+static void pnp_exit_ext_func_mode(device_t dev)
+{
+ unsigned int port = dev >> 8;
+ outb(0xaa, port);
+}
+
+static void w83977fa_enable_serial(device_t dev, unsigned int iobase)
+{
+ pnp_enter_ext_func_mode(dev);
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, 0);
+ pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+ pnp_set_enable(dev, 1);
+ pnp_exit_ext_func_mode(dev);
+}
diff -Nru LinuxBIOSv2-2700/src/superio/winbond/w83977fa/w83977fa.h LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/w83977fa.h
--- LinuxBIOSv2-2700/src/superio/winbond/w83977fa/w83977fa.h 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/w83977fa.h 2007-06-02 19:03:07.000000000 +0600
@@ -0,0 +1,10 @@
+#define W83977FA_FDC 0 /* Floppy */
+#define W83977FA_PP 1 /* Parallel Port */
+#define W83977FA_SP1 2 /* Com1 */
+#define W83977FA_SP2 3 /* Com2 */
+#define W83977FA_RTC 4 /* RTC */
+#define W83977FA_KBC 5 /* Keyboard & Mouse */
+#define W83977FA_IR 6 /* Infrared Port */
+#define W83977FA_GPIO1 7 /* General Purpose I/O 1 */
+#define W83977FA_GPIO2 8 /* General Purpose I/O 2 */
+
diff -Nru LinuxBIOSv2-2700/targets/iei/juki511p/Config.lb LinuxBIOSv2-2700-juki/targets/iei/juki511p/Config.lb
--- LinuxBIOSv2-2700/targets/iei/juki511p/Config.lb 1970-01-01 05:00:00.000000000 +0500
+++ LinuxBIOSv2-2700-juki/targets/iei/juki511p/Config.lb 2007-06-02 19:07:21.000000000 +0600
@@ -0,0 +1,20 @@
+# Config file for the IEI juki511p motherboard
+# This will make a target directory of juki511p
+
+target juki511p
+mainboard iei/juki511p
+
+option ROM_SIZE=256*1024
+
+option HAVE_PIRQ_TABLE=1
+
+option CONFIG_COMPRESS=0
+option CONFIG_PRECOMPRESSED_PAYLOAD=0
+
+romimage "image"
+ option ROM_IMAGE_SIZE=64*1024
+ option LINUXBIOS_EXTRA_VERSION="-filo"
+ payload ../../filo.elf
+end
+
+buildrom ./linuxbios.rom ROM_SIZE "image"
-------------- next part --------------
[ 0.000000] Linux version 2.6.21-juki (nikola at localhost) (gcc version 3.4.6 (Gentoo 3.4.6-r2, ssp-3.4.6-1.0, pie-8.7.10)) #20 Thu May 31 17:43:37 YEKST 2007
[ 0.000000] BIOS-provided physical RAM map:
[ 0.000000] sanitize start
[ 0.000000] sanitize end
[ 0.000000] copy_e820_map() start: 0000000000001000 size: 00000000000ef000 end: 00000000000f0000 type: 1
[ 0.000000] copy_e820_map() type is E820_RAM
[ 0.000000] copy_e820_map() lies in range...
[ 0.000000] copy_e820_map() start < 0xA0000ULL
[ 0.000000] copy_e820_map() end <= 0x100000ULL
[ 0.000000] copy_e820_map() start: 0000000000100000 size: 0000000007b00000 end: 0000000007c00000 type: 1
[ 0.000000] copy_e820_map() type is E820_RAM
[ 0.000000] BIOS-e820: 0000000000001000 - 00000000000a0000 (usable)
[ 0.000000] BIOS-e820: 0000000000100000 - 0000000007c00000 (usable)
[ 0.000000] 124MB LOWMEM available.
[ 0.000000] Entering add_active_range(0, 0, 31744) 0 entries of 256 used
[ 0.000000] Zone PFN ranges:
[ 0.000000] DMA 0 -> 4096
[ 0.000000] Normal 4096 -> 31744
[ 0.000000] early_node_map[1] active PFN ranges
[ 0.000000] 0: 0 -> 31744
[ 0.000000] On node 0 totalpages: 31744
[ 0.000000] DMA zone: 32 pages used for memmap
[ 0.000000] DMA zone: 0 pages reserved
[ 0.000000] DMA zone: 4064 pages, LIFO batch:0
[ 0.000000] Normal zone: 216 pages used for memmap
[ 0.000000] Normal zone: 27432 pages, LIFO batch:7
[ 0.000000] DMI not present or invalid.
[ 0.000000] Allocating PCI resources starting at 10000000 (gap: 07c00000:f8400000)
[ 0.000000] Built 1 zonelists. Total pages: 31496
[ 0.000000] Kernel command line: syscrtc=/dev/hda1 clocksource=pit video=gx1fb:monitor:800x600 at 60,mode:800x600-8 at 60,crt:1 ide=nodma ide-delay=2 hdc=none console=ttyS0,115200 ide1=noprobe
[ 0.000000] ide_setup: ide=nodma : Prevented DMA
[ 0.000000] ide_setup: ide-delay=2 : Delay set to 2ms
[ 0.000000] ide_setup: hdc=none
[ 0.000000] ide_setup: ide1=noprobe
[ 0.000000] Initializing CPU#0
[ 0.000000] PID hash table entries: 512 (order: 9, 2048 bytes)
[ 0.000000] Detected 300.691 MHz processor.
[ 0.000000] Console: colour dummy device 80x25
[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] Memory: 121968k/126976k available (1676k kernel code, 4460k reserved, 414k data, 184k init, 0k highmem)
[ 0.000000] virtual kernel memory layout:
[ 0.000000] fixmap : 0xffffd000 - 0xfffff000 ( 8 kB)
[ 0.000000] vmalloc : 0xc8800000 - 0xffffb000 ( 887 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xc7c00000 ( 124 MB)
[ 0.000000] .init : 0xc030e000 - 0xc033c000 ( 184 kB)
[ 0.000000] .data : 0xc02a30f6 - 0xc030a94c ( 414 kB)
[ 0.000000] .text : 0xc0100000 - 0xc02a30f6 (1676 kB)
[ 0.000000] Checking if this processor honours the WP bit even in supervisor mode... Ok.
[ 0.160000] Calibrating delay using timer specific routine.. 602.26 BogoMIPS (lpj=3011311)
[ 0.160000] Mount-cache hash table entries: 512
[ 0.170000] CPU: After generic identify, caps: 00808131 01818131 00000000 00000000 00000000 00000000 00000000
[ 0.170000] Working around Cyrix MediaGX virtual DMA bugs.
[ 0.180000] Enable Memory-Write-back mode on Cyrix/NSC processor.
[ 0.180000] Enable Memory access reorder on Cyrix/NSC processor.
[ 0.180000] Enable Incrementor on Cyrix/NSC processor.
[ 0.190000] CPU: After all inits, caps: 00808131 00818131 00000000 00000001 00000000 00000000 00000000
[ 0.190000] CPU: NSC Geode(TM) Integrated Processor by National Semi stepping 02
[ 0.200000] Checking 'hlt' instruction... OK.
[ 0.240000] NET: Registered protocol family 16
[ 0.240000] PCI: Using configuration type 1
[ 0.250000] Setting up standard PCI resources
[ 0.260000] usbcore: registered new interface driver usbfs
[ 0.260000] usbcore: registered new interface driver hub
[ 0.270000] usbcore: registered new device driver usb
[ 0.270000] PCI: Probing PCI hardware
[ 0.280000] PCI: Probing PCI hardware (bus 00)
[ 0.280000] Boot video device is 0000:00:12.4
[ 0.280000] PCI: Scanning for ghost devices on bus 0
[ 0.280000] PCI: IRQ init
[ 0.280000] PCI: Interrupt Routing Table found at 0xc00f0000
[ 0.280000] 00:13 slot=00 0:01/0800 1:02/0400 2:03/0000 3:04/0000
[ 0.280000] 00:0e slot=00 0:02/0400 1:03/0000 2:04/0000 3:01/0800
[ 0.280000] PCI: Attempting to find IRQ router for 1078:0002
[ 0.280000] PCI: Using IRQ router NatSemi [1078/0100] at 0000:00:12.0
[ 0.290000] PCI: IRQ fixup
[ 0.290000] IRQ for 0000:00:0e.0[A] -> PIRQ 02, mask 0400, excl 0c00 -> newirq=0 ... failed
[ 0.290000] IRQ for 0000:00:13.0[A] -> PIRQ 01, mask 0800, excl 0c00 -> newirq=0 ... failed
[ 0.290000] PCI: Allocating resources
[ 0.290000] PCI: Resource 00001000-000010ff (f=101, d=0, p=0)
[ 0.300000] PCI: Resource febfd000-febfd0ff (f=200, d=0, p=0)
[ 0.310000] PCI: Resource febfe000-febfe0ff (f=200, d=0, p=0)
[ 0.310000] PCI: Resource 000001f0-000001f7 (f=110, d=0, p=0)
[ 0.320000] PCI: Resource 000003f6-000003f6 (f=110, d=0, p=0)
[ 0.320000] PCI: Resource 00000170-00000177 (f=110, d=0, p=0)
[ 0.330000] PCI: Resource 00000376-00000376 (f=110, d=0, p=0)
[ 0.330000] PCI: Resource 00001400-0000147f (f=101, d=0, p=0)
[ 0.340000] PCI: Resource febff000-febff07f (f=200, d=0, p=0)
[ 0.350000] PCI: Resource febfb000-febfbfff (f=200, d=0, p=0)
[ 0.350000] PCI: Resource febfc000-febfcfff (f=200, d=0, p=0)
[ 0.360000] PCI: Ignore bogus resource 6 [0:0] of 0000:00:12.4
[ 0.360000] NET: Registered protocol family 2
[ 0.370000] Time: pit clocksource has been installed.
[ 0.460000] IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.460000] TCP established hash table entries: 4096 (order: 3, 32768 bytes)
[ 0.470000] TCP bind hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.480000] TCP: Hash tables configured (established 4096 bind 4096)
[ 0.480000] TCP reno registered
[ 0.520000] Unpacking initramfs... done
[ 1.100000] Freeing initrd memory: 824k freed
[ 1.100000] Geode GX1: 00,9c,c8,bb,01,05
[ 1.100000] Geode GX1: Internal IOBASE at 0x40000000
[ 1.110000] Geode GX1: SMM is disabled
[ 1.110000] Geode GX1: Suspend on HLT feature enabled
[ 1.120000] Geode GX1: Write through between 640kiB/1MiB is enabled
[ 1.130000] Geode GX1: Reordering between 0x00000000/0x3fffffff is disabled
[ 1.130000] Geode GX1: Reordering between 0x40000000/0x7fffffff is disabled
[ 1.140000] Geode GX1: Reordering between 0x80000000/0xbfffffff is enabled
[ 1.150000] Geode GX1: Reordering between 0xc0000000/0xffffffff is enabled
[ 1.150000] Geode GX1: FPU fast mode enabled
[ 1.160000] Geode GX1: DTE cache enabled
[ 1.160000] Geode GX1: Memory Read Bypass enabled
[ 1.170000] Geode GX1: IO Recovery Time is 6 clocks
[ 1.170000] Geode GX1: MMX instructions are enabled
[ 1.180000] Geode GX1 Chipset Support (c) Juergen Beisert 2007 juergen at kreuzholzen.de
[ 1.180000] Geode GX1: Forcing round robin policy due to active video
[ 1.190000] Geode GX1: 0x00701520, 0x92162008, 0x00000018, 0x3A733225
[ 1.200000] Geode GX1: Memory base clock is one fourth the CPU clock
[ 1.200000] Geode GX1: Memory refresh rate is 2048 cpu clocks
[ 1.210000] Geode GX1: SDCLOCK shift is 1.5 clocks
[ 1.210000] Geode GX1: Read Data Phase is 1 clocks
[ 1.220000] Geode GX1: CAS latency: 3 clocks
[ 1.220000] Geode GX1: RFSH to RFSH/ACT Period: 11 clocks
[ 1.230000] Geode GX1: ACT to PRE Period: 8 clocks
[ 1.230000] Geode GX1: PRE to ACT Period: 3 clocks
[ 1.240000] Geode GX1: ACT to Read/Write Delay: 3 clocks
[ 1.240000] Geode GX1: ACT(0) to ACT(1) Period: 2 clocks
[ 1.250000] Geode GX1: Data-in to PRE Period: 2 clocks
[ 1.250000] Geode GX1: XBUS round robin: active
[ 1.260000] Geode GX1: Scratch Pad Ram and Video Instructions disabled
[ 1.270000] Geode GX1: Full memory size is 131072kiB
[ 1.270000] Geode GX1: Top of memory is at 0x07BFFFFF
[ 1.280000] Geode GX1: Video memory size is 4096kiB
[ 1.280000] Cyrix Kahlua SMI Support (c) Juergen Beisert 2006 juergen at kreuzholzen.de
[ 1.290000] Installing knfsd (copyright (C) 1996 okir at monad.swb.de).
[ 1.300000] io scheduler noop registered (default)
[ 1.300000] PCI: Fixup for MediaGX/Geode Slave Disconnect Boundary (0x41=0x10)
[ 1.310000] Geode GX1 Framebuffer 0000:00:12.4: geode_gx1_video_probe called
[ 1.310000] Geode GX1 Framebuffer 0000:00:12.4: gx1fb_init_fbinfo called
[ 1.310000] Geode GX1 Framebuffer 0000:00:12.4: geode_map_areas called
[ 1.310000] Geode GX1 Framebuffer 0000:00:12.4: 4096 Kibyte of video memory at 0x40800000
[ 1.320000] Geode GX1 Framebuffer 0000:00:12.4: parse_panel_option called
[ 1.320000] Geode FB: Searching for Monitor 800x600 at 60
[ 1.320000] Geode FB: Creating generic monitor
[ 1.320000] Geode GX1 Framebuffer 0000:00:12.4: gx1fb_init_fbinfo left
[ 1.320000] Geode GX1 Framebuffer 0000:00:12.4: Searching for mode 800x600-8 at 60
[ 1.320000] Geode GX1 Framebuffer 0000:00:12.4: gx1fb_check_var called
[ 1.320000] Geode GX1 Framebuffer 0000:00:12.4: Mode 800x600 at 8 possible
[ 1.330000] Geode GX1 Framebuffer 0000:00:12.4: gx1fb_check_var called
[ 1.330000] Geode GX1 Framebuffer 0000:00:12.4: Mode 800x600 at 8 possible
[ 1.340000] Geode GX1 Framebuffer 0000:00:12.4: gx1fb_set_par called
[ 1.340000] Geode GX1 Framebuffer 0000:00:12.4: Geode GX1: switch to 800 x 600 (virtual 800 x 600 : 0, 0)
[ 1.340000] With line length of 800 (accel = off )
[ 1.340000] Geode GX1 Framebuffer 0000:00:12.4: geode_gx1_prepare_blt entered, set to 0x00000000
[ 1.360000] Console: switching to colour frame buffer device 100x37
[ 1.390000] Geode GX1 Framebuffer 0000:00:12.4: fb0: Geode GX1 frame buffer device
[ 1.780000] Real Time Clock Driver v1.12ac
[ 1.780000] Serial: 8250/16550 driver $Revision: 1.90 $ 2 ports, IRQ sharing disabled
[ 1.790000] serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
[ 1.800000] serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
[ 1.800000] 8139too Fast Ethernet driver 0.9.28
[ 1.810000] IRQ for 0000:00:0e.0[A] -> PIRQ 02, mask 0400, excl 0c00 -> newirq=10 -> assigning IRQ 10<7>PCI: setting IRQ 10 as level-triggered
[ 1.810000] -> edge ... OK
[ 1.810000] PCI: Assigned IRQ 10 for device 0000:00:0e.0
[ 1.810000] eth0: RealTek RTL8139 at 0x1000, 00:08:9b:58:74:da, IRQ 10
[ 1.820000] eth0: Identified 8139 chip type 'RTL-8139C'
[ 1.820000] Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
[ 1.830000] ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
[ 1.840000] CS5530: IDE controller at PCI slot 0000:00:12.2
[ 1.840000] CS5530: chipset revision 0
[ 1.850000] CS5530: not 100% native mode: will probe irqs later
[ 1.850000] PCI: Setting latency timer of device 0000:00:12.0 to 64
[ 1.850000] PCI: Setting latency timer of device 0000:00:12.2 to 64
[ 1.850000] ide0: BM-DMA at 0x1400-0x1407, BIOS settings: hda:pio, hdb:pio
[ 1.860000] ide1: BM-DMA at 0x1408-0x140f, BIOS settings: hdc:pio, hdd:pio
[ 1.870000] Probing IDE interface ide0...
[ 2.120000] hda: TRANSCEND, CFA DISK drive
[ 2.240000] Clocksource tsc unstable (delta = -352701812 ns)
[ 2.360000] hda: cs5530_set_xfer_mode(PIO 1)
[ 2.360000] ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
[ 2.360000] hda: max request size: 128KiB
[ 2.360000] hda: 506016 sectors (259 MB) w/1KiB Cache, CHS=502/16/63
[ 2.370000] hda: hda1
[ 2.380000] ohci_hcd: 2006 August 04 USB 1.1 'Open' Host Controller (OHCI) Driver
[ 2.380000] IRQ for 0000:00:13.0[A] -> PIRQ 01, mask 0800, excl 0c00 -> newirq=11 -> assigning IRQ 11<7>PCI: setting IRQ 11 as level-triggered
[ 2.380000] -> edge ... OK
[ 2.380000] PCI: Assigned IRQ 11 for device 0000:00:13.0
[ 2.380000] ohci_hcd 0000:00:13.0: OHCI Host Controller
[ 2.390000] ohci_hcd 0000:00:13.0: new USB bus registered, assigned bus number 1
[ 2.400000] ohci_hcd 0000:00:13.0: irq 11, io mem 0xfebfc000
[ 2.460000] usb usb1: configuration #1 chosen from 1 choice
[ 2.460000] hub 1-0:1.0: USB hub found
[ 2.470000] hub 1-0:1.0: 2 ports detected
[ 2.580000] serio: i8042 KBD port at 0x60,0x64 irq 1
[ 2.580000] serio: i8042 AUX port at 0x60,0x64 irq 12
[ 2.590000] mice: PS/2 mouse device common for all mice
[ 2.590000] input: PC Speaker as /class/input/input0
[ 2.600000] Advanced Linux Sound Architecture Driver Version 1.0.14rc3 (Wed Mar 14 07:25:50 2007 UTC).
[ 2.620000] Cyrix Kahlua native port XpressAudio support (c) Juergen Beisert 2007 juergen at kreuzholzen.de
[ 2.630000] Found Chip at 0xFEBFF000, mapped to 0xc8812000
[ 2.640000] Enabling Kahlua AC97 support
[ 2.640000] PCI: Setting latency timer of device 0000:00:12.3 to 64
[ 2.650000] snd_cs5530_pcm called
[ 2.660000] ALSA device list:
[ 2.660000] #0: cs5530 at 0x4273991680 irq -1
[ 2.670000] TCP cubic registered
[ 2.670000] NET: Registered protocol family 1
[ 2.680000] NET: Registered protocol family 17
[ 2.680000] Using IPI Shortcut mode
[ 2.690000] Freeing unused kernel memory: 184k freed
[ 2.700000] input: AT Translated Set 2 keyboard as /class/input/input1
[ 3.050000] eth0: link up, 100Mbps, full-duplex, lpa 0x41E1
[ 24.780000] EXT2-fs warning: maximal mount count reached, running e2fsck is recommended
[ 37.390000] usb 1-2: new low speed USB device using ohci_hcd and address 2
[ 37.580000] usb 1-2: configuration #1 chosen from 1 choice
[ 45.030000] usb 1-2: USB disconnect, address 2
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