[LinuxBIOS] r394 - in LinuxBIOSv3: mainboard mainboard/adl/msm800sev mainboard/amd/norwich mainboard/artecgroup mainboard/artecgroup/dbe61 mainboard/emulation/qemu-x86 util/dtc
Marc Jones
Marc.Jones at AMD.com
Fri Jun 29 00:46:18 CEST 2007
Ron,
A general comment about the dbe61. This doesn't look like it came from
the code I checked in last week. You should look at the fake spd code in
the dbe61 as well. I think it is the better way to do it since customers
will have memory specs that look like SPD values. It is not easy to
translate to Geode MC settings.
Marc
svn at openbios.org wrote:
>Author: rminnich
>Date: 2007-06-28 18:21:38 +0200 (Thu, 28 Jun 2007)
>New Revision: 394
>
>Added:
> LinuxBIOSv3/mainboard/artecgroup/
> LinuxBIOSv3/mainboard/artecgroup/Kconfig
> LinuxBIOSv3/mainboard/artecgroup/dbe61/
> LinuxBIOSv3/mainboard/artecgroup/dbe61/Kconfig
> LinuxBIOSv3/mainboard/artecgroup/dbe61/Makefile
> LinuxBIOSv3/mainboard/artecgroup/dbe61/cmos.layout
> LinuxBIOSv3/mainboard/artecgroup/dbe61/dts
> LinuxBIOSv3/mainboard/artecgroup/dbe61/initram.c
> LinuxBIOSv3/mainboard/artecgroup/dbe61/irq_tables.c
>Removed:
> LinuxBIOSv3/mainboard/adl/msm800sev/mainboard.c
> LinuxBIOSv3/mainboard/amd/norwich/mainboard.c
> LinuxBIOSv3/mainboard/emulation/qemu-x86/mainboard.c
>Modified:
> LinuxBIOSv3/mainboard/Kconfig
> LinuxBIOSv3/mainboard/adl/msm800sev/dts
> LinuxBIOSv3/mainboard/amd/norwich/dts
> LinuxBIOSv3/mainboard/emulation/qemu-x86/dts
> LinuxBIOSv3/util/dtc/flattree.c
>Log:
>Signed-off-by: Ronald G. Minnich <rminnich at gmail.com
>Acked-by: Stefan Reinauer <stepan at coresystems.de
>
>This patch adds artec dbe61 support, removes all mainboard.c, and
> adds
> the code to dtc so that it takes these properties from the top level
> dts:
> /{
> .
> .
> .
>
> mainboard-vendor = "AMD";
> mainboard-part-number = "Norwich";
> }
>
> statictree.h will have:
> extern const char *mainboard_vendor, *mainboard_part_number;
>
> and statictree.c will have:
> const char *mainboard_vendor = "AMD";
> const char *mainboard_part_number = "Norwich";
>
> It is an error to NOT have the vendor and part number in the top
> level dts.
>
> thanks
>
> ron
>
>Get rid of mainboard.c in all mainboard directories.
>Modify dtc so that it creates declarations (in statictree.h) and
>generates the char *
>for mainboard name and part # (in statictree.c).
>
>Failure to set up a mainboard-vendor
>OR mainboard-part-number property in the mainboard dts will get a
>helpful and descriptive error message (tested).
>This may be a first for the linuxbios config
>tools.
>
>Add Georgi's patch for the bug in flattree.c; assign *cp = 0.
>
>
>
>
>Modified: LinuxBIOSv3/mainboard/Kconfig
>===================================================================
>--- LinuxBIOSv3/mainboard/Kconfig 2007-06-28 15:19:30 UTC (rev 393)
>+++ LinuxBIOSv3/mainboard/Kconfig 2007-06-28 16:21:38 UTC (rev 394)
>@@ -38,6 +38,12 @@
> Select this option for various systems from
> Advanced Micro Devices, Inc
>
>+config VENDOR_ARTECGROUP
>+ bool "Artec Group"
>+ help
>+ Select this option for various systems from
>+ the Artec Group
>+
> config VENDOR_EMULATION
> bool "Emulated systems"
> help
>@@ -48,6 +54,7 @@
> source "mainboard/emulation/Kconfig"
> source "mainboard/adl/Kconfig"
> source "mainboard/amd/Kconfig"
>+source "mainboard/artecgroup/Kconfig"
>
> choice
> prompt "ROM chip size"
>
>Modified: LinuxBIOSv3/mainboard/adl/msm800sev/dts
>===================================================================
>--- LinuxBIOSv3/mainboard/adl/msm800sev/dts 2007-06-28 15:19:30 UTC (rev 393)
>+++ LinuxBIOSv3/mainboard/adl/msm800sev/dts 2007-06-28 16:21:38 UTC (rev 394)
>@@ -22,6 +22,8 @@
>
> /{
>
>+ mainboard-vendor = "Advanced Digital Logic";
>+ mainboard-part-number = "MSM800SEV";
> cpus {
> enabled;
> };
>
>Deleted: LinuxBIOSv3/mainboard/adl/msm800sev/mainboard.c
>===================================================================
>--- LinuxBIOSv3/mainboard/adl/msm800sev/mainboard.c 2007-06-28 15:19:30 UTC (rev 393)
>+++ LinuxBIOSv3/mainboard/adl/msm800sev/mainboard.c 2007-06-28 16:21:38 UTC (rev 394)
>@@ -1,24 +0,0 @@
>-/*
>- * This file is part of the LinuxBIOS project.
>- *
>- * Copyright (C) 2007 Ronald G. Minnich <rminnich at gmail.com>
>- * Copyright (C) 2007 coresystems GmbH
>- * (Written by Stefan Reinauer <stepan at coresystems.de> for coresystems GmbH)
>- *
>- * This program is free software; you can redistribute it and/or modify
>- * it under the terms of the GNU General Public License as published by
>- * the Free Software Foundation; either version 2 of the License, or
>- * (at your option) any later version.
>- *
>- * This program is distributed in the hope that it will be useful,
>- * but WITHOUT ANY WARRANTY; without even the implied warranty of
>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>- * GNU General Public License for more details.
>- *
>- * You should have received a copy of the GNU General Public License
>- * along with this program; if not, write to the Free Software
>- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
>- */
>-
>-const char *mainboard_vendor = "Advanced Digital Logic";
>-const char *mainboard_part_number = "MSM800SEV";
>
>Modified: LinuxBIOSv3/mainboard/amd/norwich/dts
>===================================================================
>--- LinuxBIOSv3/mainboard/amd/norwich/dts 2007-06-28 15:19:30 UTC (rev 393)
>+++ LinuxBIOSv3/mainboard/amd/norwich/dts 2007-06-28 16:21:38 UTC (rev 394)
>@@ -19,7 +19,8 @@
> */
> /{
> enabled;
>-
>+ mainboard-vendor = "AMD";
>+ mainboard-part-number = "Norwich";
> cpus {
> enabled;
> };
>
>Deleted: LinuxBIOSv3/mainboard/amd/norwich/mainboard.c
>===================================================================
>--- LinuxBIOSv3/mainboard/amd/norwich/mainboard.c 2007-06-28 15:19:30 UTC (rev 393)
>+++ LinuxBIOSv3/mainboard/amd/norwich/mainboard.c 2007-06-28 16:21:38 UTC (rev 394)
>@@ -1,24 +0,0 @@
>-/*
>- * This file is part of the LinuxBIOS project.
>- *
>- * Copyright (C) 2007 Ronald G. Minnich <rminnich at gmail.com>
>- * Copyright (C) 2007 coresystems GmbH
>- * (Written by Stefan Reinauer <stepan at coresystems.de> for coresystems GmbH)
>- *
>- * This program is free software; you can redistribute it and/or modify
>- * it under the terms of the GNU General Public License as published by
>- * the Free Software Foundation; either version 2 of the License, or
>- * (at your option) any later version.
>- *
>- * This program is distributed in the hope that it will be useful,
>- * but WITHOUT ANY WARRANTY; without even the implied warranty of
>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>- * GNU General Public License for more details.
>- *
>- * You should have received a copy of the GNU General Public License
>- * along with this program; if not, write to the Free Software
>- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
>- */
>-
>-const char *mainboard_vendor = "AMD";
>-const char *mainboard_part_number = "Norwich";
>
>Added: LinuxBIOSv3/mainboard/artecgroup/Kconfig
>===================================================================
>--- LinuxBIOSv3/mainboard/artecgroup/Kconfig (rev 0)
>+++ LinuxBIOSv3/mainboard/artecgroup/Kconfig 2007-06-28 16:21:38 UTC (rev 394)
>@@ -0,0 +1,38 @@
>+##
>+## This file is part of the LinuxBIOS project.
>+##
>+## Copyright (C) 2007 coresystems GmbH
>+## (Written by Stefan Reinauer <stepan at coresystems.de> for coresystems GmbH)
>+##
>+## This program is free software; you can redistribute it and/or modify
>+## it under the terms of the GNU General Public License as published by
>+## the Free Software Foundation; either version 2 of the License, or
>+## (at your option) any later version.
>+##
>+## This program is distributed in the hope that it will be useful,
>+## but WITHOUT ANY WARRANTY; without even the implied warranty of
>+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>+## GNU General Public License for more details.
>+##
>+## You should have received a copy of the GNU General Public License
>+## along with this program; if not, write to the Free Software
>+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
>+##
>+
>+choice
>+ prompt "Mainboard model"
>+ depends on VENDOR_ARTECGROUP
>+
>+config BOARD_ARTECGROUP_DBE61
>+ bool "dbe61"
>+ select ARCH_X86
>+ select CPU_AMD_GEODELX
>+ select OPTION_TABLE
>+ select NORTHBRIDGE_AMD_GEODELX
>+ select SOUTHBRIDGE_AMD_CS5536
>+ help
>+ Artec Group DBE61, also known as Linutop
>+endchoice
>+
>+source "mainboard/artecgroup/dbe61/Kconfig"
>+
>
>Added: LinuxBIOSv3/mainboard/artecgroup/dbe61/Kconfig
>===================================================================
>--- LinuxBIOSv3/mainboard/artecgroup/dbe61/Kconfig (rev 0)
>+++ LinuxBIOSv3/mainboard/artecgroup/dbe61/Kconfig 2007-06-28 16:21:38 UTC (rev 394)
>@@ -0,0 +1,45 @@
>+##
>+## This file is part of the LinuxBIOS project.
>+##
>+## Copyright (C) 2007 coresystems GmbH
>+## (Written by Stefan Reinauer <stepan at coresystems.de> for coresystems GmbH)
>+##
>+## This program is free software; you can redistribute it and/or modify
>+## it under the terms of the GNU General Public License as published by
>+## the Free Software Foundation; either version 2 of the License, or
>+## (at your option) any later version.
>+##
>+## This program is distributed in the hope that it will be useful,
>+## but WITHOUT ANY WARRANTY; without even the implied warranty of
>+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>+## GNU General Public License for more details.
>+##
>+## You should have received a copy of the GNU General Public License
>+## along with this program; if not, write to the Free Software
>+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
>+##
>+
>+config MAINBOARD_NAME
>+ string
>+ default artecgroup/dbe61
>+ depends BOARD_ARTECGROUP_DBE61
>+ help
>+ This is the default mainboard name.
>+
>+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
>+ hex
>+ default 0x1022
>+ depends BOARD_ARTECGROUP_DBE61
>+ help
>+ Mainboard specific PCI subsystem vendor ID.
>+
>+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
>+ hex
>+ default 0x2323
>+ depends BOARD_ARTECGROUP_DBE61
>+ help
>+ Mainboard specific PCI subsystem device ID.
>+
>+
>+
>+
>
>Added: LinuxBIOSv3/mainboard/artecgroup/dbe61/Makefile
>===================================================================
>--- LinuxBIOSv3/mainboard/artecgroup/dbe61/Makefile (rev 0)
>+++ LinuxBIOSv3/mainboard/artecgroup/dbe61/Makefile 2007-06-28 16:21:38 UTC (rev 394)
>@@ -0,0 +1,76 @@
>+##
>+## This file is part of the LinuxBIOS project.
>+##
>+## Copyright (C) 2006-2007 coresystems GmbH
>+## (Written by Stefan Reinauer <stepan at coresystems.de> for coresystems GmbH)
>+##
>+## This program is free software; you can redistribute it and/or modify
>+## it under the terms of the GNU General Public License as published by
>+## the Free Software Foundation; either version 2 of the License, or
>+## (at your option) any later version.
>+##
>+## This program is distributed in the hope that it will be useful,
>+## but WITHOUT ANY WARRANTY; without even the implied warranty of
>+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>+## GNU General Public License for more details.
>+##
>+## You should have received a copy of the GNU General Public License
>+## along with this program; if not, write to the Free Software
>+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
>+##
>+
>+$(obj)/linuxbios.vpd:
>+ $(Q)printf " BUILD DUMMY VPD\n"
>+ $(Q)dd if=/dev/zero of=$(obj)/linuxbios.vpd bs=256 count=1 $(SILENT)
>+
>+INITRAM_OBJ = $(obj)/mainboard/$(MAINBOARDDIR)/initram.o \
>+ $(obj)/southbridge/amd/cs5536/cs5536_early_setup.o\
>+ $(obj)/arch/x86/geodelx/geodelx.o
>+
>+$(obj)/linuxbios.initram: $(obj)/stage0.init $(obj)/stage0.o $(INITRAM_OBJ)
>+ $(Q)# initram links against stage0
>+ $(Q)printf " LD $(subst $(shell pwd)/,,$(@))\n"
>+ $(Q)$(LD) -R $(obj)/stage0.o -Ttext 0x80000 $(INITRAM_OBJ) \
>+ --entry=main -o $(obj)/linuxbios.initram.o
>+ $(Q)printf " OBJCOPY $(subst $(shell pwd)/,,$(@))\n"
>+ $(Q)$(OBJCOPY) -O binary $(obj)/linuxbios.initram.o \
>+ $(obj)/linuxbios.initram
>+
>+#
>+# Miscellaneous important targets.
>+#
>+
>+$(obj)/mainboard/$(MAINBOARDDIR)/mainboard.o: $(obj)/mainboard/$(MAINBOARDDIR)/statictree.o
>+
>+$(obj)/mainboard/$(MAINBOARDDIR)/statictree.o: $(obj)/mainboard/$(MAINBOARDDIR)/statictree.c $(obj)/statictree.h
>+ $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n"
>+ $(Q)$(CC) $(INITCFLAGS) $(LINUXBIOSINCLUDE) -c -o $@ $<
>+
>+$(obj)/mainboard/$(MAINBOARDDIR)/statictree.c: $(src)/mainboard/$(MAINBOARDDIR)/dts $(obj)/util/dtc/dtc
>+ $(Q)printf " DTC $(subst $(shell pwd)/,,$(@))\n"
>+ $(Q)$(obj)/util/dtc/dtc -O lb mainboard/$(MAINBOARDDIR)/dts > $@
>+
>+$(obj)/statictree.h: $(src)/mainboard/$(MAINBOARDDIR)/dts $(obj)/util/dtc/dtc
>+ $(Q)printf " DTC $(subst $(shell pwd)/,,$(@))\n"
>+ $(Q)$(obj)/util/dtc/dtc -O lbh mainboard/$(MAINBOARDDIR)/dts > $@
>+
>+$(obj)/mainboard/$(MAINBOARDDIR)/option_table.c: $(obj)/util/options/build_opt_tbl $(src)/mainboard/$(MAINBOARDDIR)/cmos.layout
>+ $(Q)printf " OPTIONS $(subst $(shell pwd)/,,$(@))\n"
>+ $(Q)mkdir -p $(obj)/mainboard/$(MAINBOARDDIR)
>+ $(Q)$(obj)/util/options/build_opt_tbl -b \
>+ --config $(src)/mainboard/$(MAINBOARDDIR)/cmos.layout \
>+ --option $(obj)/mainboard/$(MAINBOARDDIR)/option_table.c
>+
>+$(obj)/option_table: $(obj)/mainboard/$(MAINBOARDDIR)/option_table.o
>+ $(Q)printf " OBJCOPY $(subst $(shell pwd)/,,$(@))\n"
>+ $(Q)$(OBJCOPY) -O binary $< $@
>+
>+STAGE2_MAINBOARD_OBJ = mainboard.o
>+
>+STAGE2_CHIPSET_OBJ = $(obj)/arch/x86/geodelx/cpu.o
>+
>+$(obj)/mainboard/$(MAINBOARDDIR)/%.o: $(src)/mainboard/$(MAINBOARDDIR)/%.c
>+ $(Q)mkdir -p $(obj)/mainboard/$(MAINBOARDDIR)
>+ $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n"
>+ $(Q)$(CC) $(INITCFLAGS) -c $< -o $@
>+
>
>Added: LinuxBIOSv3/mainboard/artecgroup/dbe61/cmos.layout
>===================================================================
>--- LinuxBIOSv3/mainboard/artecgroup/dbe61/cmos.layout (rev 0)
>+++ LinuxBIOSv3/mainboard/artecgroup/dbe61/cmos.layout 2007-06-28 16:21:38 UTC (rev 394)
>@@ -0,0 +1,74 @@
>+entries
>+
>+#start-bit length config config-ID name
>+#0 8 r 0 seconds
>+#8 8 r 0 alarm_seconds
>+#16 8 r 0 minutes
>+#24 8 r 0 alarm_minutes
>+#32 8 r 0 hours
>+#40 8 r 0 alarm_hours
>+#48 8 r 0 day_of_week
>+#56 8 r 0 day_of_month
>+#64 8 r 0 month
>+#72 8 r 0 year
>+#80 4 r 0 rate_select
>+#84 3 r 0 REF_Clock
>+#87 1 r 0 UIP
>+#88 1 r 0 auto_switch_DST
>+#89 1 r 0 24_hour_mode
>+#90 1 r 0 binary_values_enable
>+#91 1 r 0 square-wave_out_enable
>+#92 1 r 0 update_finished_enable
>+#93 1 r 0 alarm_interrupt_enable
>+#94 1 r 0 periodic_interrupt_enable
>+#95 1 r 0 disable_clock_updates
>+#96 288 r 0 temporary_filler
>+0 384 r 0 reserved_memory
>+384 1 e 4 boot_option
>+385 1 e 4 last_boot
>+386 1 e 1 ECC_memory
>+388 4 r 0 reboot_bits
>+392 3 e 5 baud_rate
>+400 1 e 1 power_on_after_fail
>+412 4 e 6 debug_level
>+416 4 e 7 boot_first
>+420 4 e 7 boot_second
>+424 4 e 7 boot_third
>+428 4 h 0 boot_index
>+432 8 h 0 boot_countdown
>+1008 16 h 0 check_sum
>+
>+enumerations
>+
>+#ID value text
>+1 0 Disable
>+1 1 Enable
>+2 0 Enable
>+2 1 Disable
>+4 0 Fallback
>+4 1 Normal
>+5 0 115200
>+5 1 57600
>+5 2 38400
>+5 3 19200
>+5 4 9600
>+5 5 4800
>+5 6 2400
>+5 7 1200
>+6 6 Notice
>+6 7 Info
>+6 8 Debug
>+6 9 Spew
>+7 0 Network
>+7 1 HDD
>+7 2 Floppy
>+7 8 Fallback_Network
>+7 9 Fallback_HDD
>+7 10 Fallback_Floppy
>+#7 3 ROM
>+
>+checksums
>+
>+checksum 392 1007 1008
>+
>+
>
>Added: LinuxBIOSv3/mainboard/artecgroup/dbe61/dts
>===================================================================
>--- LinuxBIOSv3/mainboard/artecgroup/dbe61/dts (rev 0)
>+++ LinuxBIOSv3/mainboard/artecgroup/dbe61/dts 2007-06-28 16:21:38 UTC (rev 394)
>@@ -0,0 +1,98 @@
>+/*
>+ * This file is part of the LinuxBIOS project.
>+ *
>+ * Copyright (C) 2007 Ronald G. Minnich <rminnich at gmail.com>
>+ *
>+ * This program is free software; you can redistribute it and/or modify
>+ * it under the terms of the GNU General Public License as published by
>+ * the Free Software Foundation; either version 2 of the License, or
>+ * (at your option) any later version.
>+ *
>+ * This program is distributed in the hope that it will be useful,
>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>+ * GNU General Public License for more details.
>+ *
>+ * You should have received a copy of the GNU General Public License
>+ * along with this program; if not, write to the Free Software
>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
>+ */
>+/* leave this in until we know how to do it in dts */
>+/*
>+ chip southbridge/amd/cs5536_lx
>+ register "enable_ide_nand_flash" = "0"
>+
>+ register "isa_irq" = "0"
>+ #register "flash_irq" = "14"
>+
>+ ## IDE IRQ
>+ register "enable_ide_irq" = "0"
>+
>+ register "audio_irq" = "5"
>+ register "usb_irq" = "7"
>+
>+ register "uart0_irq" = "0"
>+ register "uart1_irq" = "4"
>+
>+ ## PCI INTA ... INTD and their GPIO pins
>+ ## int==0: disable
>+ register "pci_int[0]" = "0"
>+ register "pci_int[1]" = "10"
>+ register "pci_int[2]" = "0"
>+ register "pci_int[3]" = "0"
>+ register "pci_int_pin[0]" = "0"
>+ register "pci_int_pin[1]" = "7"
>+ register "pci_int_pin[2]" = "0"
>+ register "pci_int_pin[3]" = "0"
>+
>+
>+ # Keyboard Emulation Logic IRQs
>+ # Enable keyboard IRQ2
>+ register "enable_kel_keyb_irq" = "0"
>+ # Enable mouse IRQ12
>+ register "enable_kel_mouse_irq" = "0"
>+ # Configure KEL Emulation IRQ, 0 to disable
>+ register "kel_emul_irq" = "0"
>+
>+ device pci f.0 on end # ISA Bridge
>+ device pci f.1 on end # Flash controller
>+ device pci f.2 off end # IDE controller
>+ device pci f.3 on end # Audio
>+ device pci f.4 on end # OHCI
>+ device pci f.5 on end # EHCI
>+ device pci f.6 off end # UDC controller
>+ device pci f.7 off end # OTG controller
>+ end
>+# chip drivers/pci/rtl8139
>+## device pci d.0 on end # Realtek LAN
>+# register "nic_irq" = "10"
>+# end
>+ end
>+end
>+
>+
>+*/
>+/{
>+ mainboard-vendor = "Artec Group";
>+ mainboard-part-number = "DBE61";
>+ enabled;
>+
>+ cpus {
>+ enabled;
>+ };
>+ domain0 {
>+ enabled;
>+ pcidomain = "0";
>+ device0,0 {
>+ enabled;
>+ pcipath = "1,0";
>+ };
>+ southbridge{
>+ /config/("southbridge/amd/cs5536");
>+ pcipath = "1,1";
>+ enabled;
>+ };
>+
>+ };
>+
>+};
>
>Added: LinuxBIOSv3/mainboard/artecgroup/dbe61/initram.c
>===================================================================
>--- LinuxBIOSv3/mainboard/artecgroup/dbe61/initram.c (rev 0)
>+++ LinuxBIOSv3/mainboard/artecgroup/dbe61/initram.c 2007-06-28 16:21:38 UTC (rev 394)
>@@ -0,0 +1,137 @@
>+/*
>+ * This file is part of the LinuxBIOS project.
>+ *
>+ * Copyright (C) 2007 Advanced Micro Devices, Inc.
>+ *
>+ * This program is free software; you can redistribute it and/or modify
>+ * it under the terms of the GNU General Public License as published by
>+ * the Free Software Foundation; either version 2 of the License, or
>+ * (at your option) any later version.
>+ *
>+ * This program is distributed in the hope that it will be useful,
>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>+ * GNU General Public License for more details.
>+ *
>+ * You should have received a copy of the GNU General Public License
>+ * along with this program; if not, write to the Free Software
>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
>+ */
>+
>+#include <types.h>
>+#include <lib.h>
>+#include <console.h>
>+#include <post_code.h>
>+#include <device/device.h>
>+#include <device/pci.h>
>+#include <string.h>
>+#include <msr.h>
>+#include <io.h>
>+#include <amd_geodelx.h>
>+#include <southbridge/amd/cs5536/cs5536.h>
>+#include <northbridge/amd/geodelx/raminit.h>
>+
>+#define MANUALCONF 0 /* Do automatic strapped PLL config */
>+#define PLLMSRHI 0x00001490 /* manual settings for the PLL */
>+#define PLLMSRLO 0x02000030
>+#define DIVIL_LBAR_GPIO 0x5140000c
>+#define DIMM0 ((u8) 0xA0)
>+#define DIMM1 ((u8) 0xA2)
>+
>+/* this is an incredibly mainboard-specific number that has no appropriate place
>+ * outside this file.
>+ */
>+#define GPIO_BASE 0x6100
>+
>+static void init_gpio(void)
>+{
>+ msr_t msr;
>+ printk(BIOS_DEBUG, "Initializing GPIO module...\n");
>+
>+ // initialize the GPIO LBAR
>+ msr.lo = GPIO_BASE;
>+ msr.hi = 0x0000f001;
>+ wrmsr(DIVIL_LBAR_GPIO, msr);
>+ msr = rdmsr(DIVIL_LBAR_GPIO);
>+ printk(BIOS_DEBUG, "DIVIL_LBAR_GPIO set to 0x%08x 0x%08x\n", msr.hi, msr.lo);
>+}
>+
>+static void sdram_hardwire(void)
>+{
>+ /* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
>+ * component Banks (byte 17) * module banks, side (byte 5) *
>+ * width in bits (byte 6,7)
>+ * = Density per side (byte 31) * number of sides (byte 5) */
>+ /* 1. Initialize GLMC registers base on SPD values, do one DIMM for now */
>+ msr_t msr;
>+
>+ msr.hi = 0x10075012;
>+ msr.lo = 0x00000040;
>+
>+ wrmsr(MC_CF07_DATA, msr); //GX3
>+
>+ /* timing and mode ... */
>+
>+ //msr = rdmsr(0x20000019);
>+
>+ /* per standard bios settings */
>+/*
>+ msr.hi = 0x18000108;
>+ msr.lo =
>+ (6<<28) | // cas_lat
>+ (10<<24)| // ref2act
>+ (7<<20)| // act2pre
>+ (3<<16)| // pre2act
>+ (3<<12)| // act2cmd
>+ (2<<8)| // act2act
>+ (2<<6)| // dplwr
>+ (2<<4)| // dplrd
>+ (3); // dal
>+ * the msr value reported by quanta is very, very different.
>+ * we will go with that value for now.
>+ *
>+ //msr.lo = 0x286332a3;
>+*/
>+ //wrmsr(0x20000019, msr); //GX3
>+
>+}
>+
>+/* CPU and GLIU mult/div */
>+#define PLLMSRhi 0x0000039C
>+/* Hold Count - how long we will sit in reset */
>+#define PLLMSRlo 0x00DE0000
>+
>+static void dbe61_msr_init(void)
>+{
>+ __builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
>+ __builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
>+
>+ __builtin_wrmsr(0x40000020, 0xfff80, 0x20000000);
>+ __builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000);
>+}
>+
>+int main(void)
>+{
>+ post_code(POST_START_OF_MAIN);
>+
>+ system_preinit();
>+ dbe61_msr_init();
>+
>+ cs5536_early_setup();
>+
>+ /* NOTE: must do this AFTER the early_setup!
>+ * it is counting on some early MSR setup
>+ * for cs5536.
>+ */
>+ cs5536_setup_onchipuart();
>+
>+ pll_reset(MANUALCONF, PLLMSRHI, PLLMSRLO);
>+
>+ cpu_reg_init(0, DIMM0, DIMM1);
>+
>+ sdram_hardwire();
>+ /* Check low memory */
>+ /*ram_check(0x00000000, 640*1024); */
>+ init_gpio();
>+ return 0;
>+}
>
>Added: LinuxBIOSv3/mainboard/artecgroup/dbe61/irq_tables.c
>===================================================================
>--- LinuxBIOSv3/mainboard/artecgroup/dbe61/irq_tables.c (rev 0)
>+++ LinuxBIOSv3/mainboard/artecgroup/dbe61/irq_tables.c 2007-06-28 16:21:38 UTC (rev 394)
>@@ -0,0 +1,60 @@
>+/* This file was generated by getpir.c, do not modify!
>+ (but if you do, please run checkpir on it to verify)
>+ * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
>+ *
>+ * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
>+*/
>+
>+#include <arch/pirq_routing.h>
>+
>+#define ID_SLOT_PCI_NET 1 // ThinCan ethernet
>+#define ID_SLOT_PCI_RSVD1 2 // reserved entry 1
>+#define ID_SLOT_PCI_RSVD3 3 // reserved entry 2
>+#define ID_SLOT_PCI_RSVD2 4 // reserved entry 3
>+#define ID_EMBED_PCI 0xff // onboard PCI device
>+
>+// CS5535 PCI INT[A-D] Interrupt Routing lines.
>+#define NO_CONNECT 0 // not used
>+#define CS_PCI_INTA 1 // PCI INTA
>+#define CS_PCI_INTB 2 // PCI INTB
>+#define CS_PCI_INTC 3 // PCI INTC
>+#define CS_PCI_INTD 4 // PCI INTD
>+
>+// IRQ bitmap reference line FEDCBA9876543210
>+// 0000110000100000b
>+#define PCI_IRQ 0xc20 // PCI allowed IRQs here
>+
>+const struct irq_routing_table intel_irq_routing_table =
>+{
>+ PIRQ_SIGNATURE, /* u32 signature */
>+ PIRQ_VERSION, /* u16 version */
>+ 32+16*6, /* there can be total 2 devices on the bus */
>+ 0x00, /* Where the interrupt router lies (bus) */
>+ (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
>+ 0x0800, /* IRQs devoted exclusively to PCI usage */
>+ 0x1022, /* Vendor */
>+ 0x208f, /* Device */
>+ 0x00000000, /* Crap (miniport) */
>+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
>+ 0xdf, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
>+ {
>+ /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
>+ // Geode GX3 Host Bridge and VGA Graphics
>+ {0, 0x01<<3, {{CS_PCI_INTA, PCI_IRQ}, {NO_CONNECT, PCI_IRQ}, {NO_CONNECT, PCI_IRQ}, {NO_CONNECT, PCI_IRQ}}, ID_EMBED_PCI, 0x0},
>+ // Realtek RTL8100/8139 Network Controller
>+ {0, 0x0d<<3, {{CS_PCI_INTB, PCI_IRQ}, {CS_PCI_INTC, PCI_IRQ}, {CS_PCI_INTD, PCI_IRQ}, {CS_PCI_INTA, PCI_IRQ}}, ID_SLOT_PCI_NET, 0x0},
>+ // Reserved for future extensions
>+ {0, 0x0c<<3, {{CS_PCI_INTA, PCI_IRQ}, {CS_PCI_INTB, PCI_IRQ}, {CS_PCI_INTC, PCI_IRQ}, {CS_PCI_INTD, PCI_IRQ}}, ID_SLOT_PCI_RSVD1, 0x0},
>+ // Geode CS5535/CS5536 IO Companion: USB controllers, IDE, Audio.
>+ {0, 0x0f<<3, {{CS_PCI_INTA, PCI_IRQ}, {CS_PCI_INTB, PCI_IRQ}, {CS_PCI_INTC, PCI_IRQ}, {CS_PCI_INTD, PCI_IRQ}}, ID_EMBED_PCI, 0x0},
>+ // Reserved for future extensions
>+ {0, 0x0e<<3, {{CS_PCI_INTC, PCI_IRQ}, {CS_PCI_INTD, PCI_IRQ}, {CS_PCI_INTA, PCI_IRQ}, {CS_PCI_INTB, PCI_IRQ}}, ID_SLOT_PCI_RSVD2, 0x0},
>+ // Reserved for future extensions
>+ {0, 0x0b<<3, {{CS_PCI_INTD, PCI_IRQ}, {CS_PCI_INTA, PCI_IRQ}, {CS_PCI_INTB, PCI_IRQ}, {CS_PCI_INTC, PCI_IRQ}}, ID_SLOT_PCI_RSVD3, 0x0}
>+ }
>+};
>+
>+unsigned long write_pirq_routing_table(unsigned long addr)
>+{
>+ return copy_pirq_routing_table(addr);
>+}
>
>Modified: LinuxBIOSv3/mainboard/emulation/qemu-x86/dts
>===================================================================
>--- LinuxBIOSv3/mainboard/emulation/qemu-x86/dts 2007-06-28 15:19:30 UTC (rev 393)
>+++ LinuxBIOSv3/mainboard/emulation/qemu-x86/dts 2007-06-28 16:21:38 UTC (rev 394)
>@@ -18,6 +18,8 @@
> * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
> */
> /{
>+ mainboard-vendor = "Emulation";
>+ mainboard-part-number = "QEMU x86";
> enabled;
> constructor = "qemuvga_constructors";
> cpus {
>
>Deleted: LinuxBIOSv3/mainboard/emulation/qemu-x86/mainboard.c
>===================================================================
>--- LinuxBIOSv3/mainboard/emulation/qemu-x86/mainboard.c 2007-06-28 15:19:30 UTC (rev 393)
>+++ LinuxBIOSv3/mainboard/emulation/qemu-x86/mainboard.c 2007-06-28 16:21:38 UTC (rev 394)
>@@ -1,24 +0,0 @@
>-/*
>- * This file is part of the LinuxBIOS project.
>- *
>- * Copyright (C) 2007 Ronald G. Minnich <rminnich at gmail.com>
>- * Copyright (C) 2007 coresystems GmbH
>- * (Written by Stefan Reinauer <stepan at coresystems.de> for coresystems GmbH)
>- *
>- * This program is free software; you can redistribute it and/or modify
>- * it under the terms of the GNU General Public License as published by
>- * the Free Software Foundation; either version 2 of the License, or
>- * (at your option) any later version.
>- *
>- * This program is distributed in the hope that it will be useful,
>- * but WITHOUT ANY WARRANTY; without even the implied warranty of
>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>- * GNU General Public License for more details.
>- *
>- * You should have received a copy of the GNU General Public License
>- * along with this program; if not, write to the Free Software
>- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
>- */
>-
>-const char *mainboard_vendor = "Emulation";
>-const char *mainboard_part_number = "QEMU x86";
>
>Modified: LinuxBIOSv3/util/dtc/flattree.c
>===================================================================
>--- LinuxBIOSv3/util/dtc/flattree.c 2007-06-28 15:19:30 UTC (rev 393)
>+++ LinuxBIOSv3/util/dtc/flattree.c 2007-06-28 16:21:38 UTC (rev 394)
>@@ -112,6 +112,7 @@
> else
> *cp = *src;
> }
>+ *cp = 0;
> cp = ret;
> if (suffix)
> strcat(cp, suffix);
>@@ -1254,6 +1255,7 @@
>
> void dt_to_linuxbios(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys)
> {
>+ struct property *prop;
> struct version_info *vi = NULL;
> int i;
> struct data strbuf = empty_data;
>@@ -1261,6 +1263,7 @@
> extern char *code;
> struct node *next;
> extern struct node *first_node;
>+ int found_mainboard_vendor = 0, found_mainboard_partnumber = 0;
>
> labeltree(bi->dt);
>
>@@ -1283,6 +1286,30 @@
> for(next = first_node; next; next = next->next)
> fprintf(f, "struct device dev_%s;\n", next->label);
>
>+ /* special for the root. Emit the names for the mainboard vendor and part # */
>+ for_each_property(bi->dt, prop) {
>+ if (streq(prop->name, "mainboard-vendor")){
>+ found_mainboard_vendor = 1;
>+ fprintf(f, "const char *mainboard_vendor = \"%s\";\n", prop->val.val);
>+ }
>+ if (streq(prop->name, "mainboard-part-number")){
>+ found_mainboard_partnumber = 1;
>+ fprintf(f, "const char *mainboard_part_number = \"%s\";\n", prop->val.val);
>+ }
>+ }
>+
>+ if (! found_mainboard_vendor){
>+ die("There is no mainboard-vendor property in the root. Please add one."
>+ "(and make sure there is a mainboard-part-number property too");
>+ }
>+
>+ if (! found_mainboard_partnumber){
>+ die("There is no mainboard-part-number property in the root. "
>+ "Please add one."
>+ "(and make sure there is a mainboard-vendor property too");
>+ }
>+
>+
> /* emit the code, if any */
> if (code)
> fprintf(f, "%s\n", code);
>@@ -1323,6 +1350,7 @@
> fix_next(bi->dt);
> /* emit any includes that we need -- TODO: ONLY ONCE PER TYPE*/
> fprintf(f, "#include <device/device.h>\n#include <device/pci.h>\n");
>+ fprintf(f, "extern const char *mainboard_vendor, *mainboard_part_number;\n");
> flatten_tree_emit_includes(bi->dt, &linuxbios_emitter, f, &strbuf, vi);
>
> flatten_tree_emit_structdecls(bi->dt, &linuxbios_emitter, f, &strbuf, vi);
>
>
>
>
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