[coreboot] r3251 build service
info at coresystems.de
Wed Apr 23 04:07:51 CEST 2008
Dear coreboot readers!
This is the automated build check service of coreboot.
The developer "mjones" checked in revision 3251 to
the coreboot source repository and caused the following
Find matching settings for each CPUs FID, VID, and P-state registers and initialize them.
Supports single and split plane systems. Set P0 on all cores for best performance.
All APs will be in hlt(C1).
The platform warm rest logic has been updated to alway reset for HT and FID/VID setup. It is not optional anymore.
Signed-off-by: Marc Jones <marc.jones at amd.com>
Acked-by: Stefan Reinauer <stepan at coresystems.de>
Compilation of amd:serengeti_cheetah_fam10 is still broken
See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3251&device=serengeti_cheetah_fam10&vendor=amd
If something broke during this checkin please be a pain
in mjones's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should
be backed out.
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