[coreboot] r672 - coreboot-v3/mainboard/artecgroup/dbe62

svn at coreboot.org svn at coreboot.org
Wed Apr 30 06:14:52 CEST 2008


Author: rminnich
Date: 2008-04-30 06:14:52 +0200 (Wed, 30 Apr 2008)
New Revision: 672

Modified:
   coreboot-v3/mainboard/artecgroup/dbe62/initram.c
Log:
Add back in missing line of DRAM info.

Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>

Acked-by: Marc Jones <marc.jones at amd.com>



Modified: coreboot-v3/mainboard/artecgroup/dbe62/initram.c
===================================================================
--- coreboot-v3/mainboard/artecgroup/dbe62/initram.c	2008-04-30 04:12:56 UTC (rev 671)
+++ coreboot-v3/mainboard/artecgroup/dbe62/initram.c	2008-04-30 04:14:52 UTC (rev 672)
@@ -63,6 +63,7 @@
 	{SPD_MIN_RAS_TO_CAS_DELAY, 0x58},
 	{SPD_tRRD, 0x3c},
 	{SPD_tRP, 0x58},
+	{SPD_PRIMARY_SDRAM_WIDTH, 8},
 	{SPD_NUM_BANKS_PER_SDRAM, 0x4},
 	{SPD_NUM_COLUMNS, 0x8},
 	{SPD_NUM_DIMM_BANKS, 0x1},





More information about the coreboot mailing list