[coreboot] brainstorm: new LPC dongle from Artec Group
Marc Jones
Marc.Jones at amd.com
Fri Aug 8 17:53:00 CEST 2008
Stefan Reinauer wrote:
> Marc Jones wrote:
>> Stefan Reinauer wrote:
>>> Dear Martin-Éric,
>>>
>>
>>> * 0x3f8 serial port logging support on lpc. (Sorry, I never looked
>>> into this)
>>>
>> Good idea.
>>
>> Power and reset headers are handy for remote development. Maybe the
>> GPIO header could be used for that on the current model?
> Yes, I believe it could be done. The bigger task though is getting the
> "reset LPC part after flash update" part right. The VHDL code locks the
> LPC side of the dongle during flash update, so no interference can
> happen. But it stays that way after the update. There might be reasons
> for that, I am not sure.
Ah, I see. That would be a problem. Power and reset would be good for
the automated testbed.
I can't find the twiki page for the automated testbed. Can you put a
link on the mainpage or the qa page?
Marc
--
Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:Marc.Jones at amd.com
http://www.amd.com/embeddedprocessors
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