[coreboot] r810 - in coreboot-v3: arch/x86/amd util/lar
svn at coreboot.org
svn at coreboot.org
Sun Aug 24 08:07:22 CEST 2008
Author: rminnich
Date: 2008-08-24 08:07:21 +0200 (Sun, 24 Aug 2008)
New Revision: 810
Modified:
coreboot-v3/arch/x86/amd/stage0.S
coreboot-v3/util/lar/stream.c
Log:
This now builds a K8 bios image.
Now to start testing.
Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
Acked-by: Ronald G. Minnich <rminnich at gmail.com>
Modified: coreboot-v3/arch/x86/amd/stage0.S
===================================================================
--- coreboot-v3/arch/x86/amd/stage0.S 2008-08-24 03:27:28 UTC (rev 809)
+++ coreboot-v3/arch/x86/amd/stage0.S 2008-08-24 06:07:21 UTC (rev 810)
@@ -453,3 +453,42 @@
.long 0x000 /* NULL, end of table */
cache_as_ram_setup_out:
+/* Reset vector. */
+
+/*
+ * RVECTOR: Size of reset vector, default is 0x10.
+ * RESRVED: Size of vpd code, default is 0xf0.
+ * BOOTBLK: Size of bootblock code, default is 0x1f00 (8k-256b).
+ */
+
+SEGMENT_SIZE = 0x10000
+RVECTOR = 0x00010
+
+/* Due to YET ANOTHER BUG in GNU bintools, you can NOT have a code16 here.
+ * I think we should leave it this way forever, as the bugs come and
+ * go -- and come again.
+ *
+ * .code16
+ * .section ".rom.text"
+ */
+.section ".reset", "ax"
+ .globl _resetjump
+_resetjump:
+ /* GNU bintools bugs again. This jumps to stage0 - 2. Sigh. */
+ /* jmp _stage0 */
+ .byte 0xe9
+ .int _stage0 - ( . + 2 )
+
+ /* Note: The above jump is hand coded to work around bugs in binutils.
+ * 5 bytes are used for a 3 byte instruction. This works because x86
+ * is little endian and allows us to use supported 32 bit relocations
+ * instead of the weird 16 bit relocations that binutils does not
+ * handle consistenly between versions because they are used so rarely.
+ */
+.byte 0
+
+/* Date? ID string? We might want to put something else in here. */
+.ascii DATE
+
+/* Checksum. */
+/* .word 0 */
Modified: coreboot-v3/util/lar/stream.c
===================================================================
--- coreboot-v3/util/lar/stream.c 2008-08-24 03:27:28 UTC (rev 809)
+++ coreboot-v3/util/lar/stream.c 2008-08-24 06:07:21 UTC (rev 810)
@@ -309,6 +309,8 @@
if (s.st_size != BOOTBLOCK_SIZE) {
err("Bootblock %s does not appear to be a bootblock.\n",
bootblock);
+ err("It is the wrong size; it should be %d bytes and it is %d bytes\n",
+ BOOTBLOCK_SIZE, s.st_size);
close(fd);
return -1;
}
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