[coreboot] v3 phase3/phase5 strangeness

[Carl-Daniel Hailfinger]

Why do we call a phase5 function in the middle of phase3? Boot log
excerpt on qemu follows:

> Phase 3: Enumerating buses...
> dev_phase3_scan: scanning root(Root Device)
> scan_static_bus for root (Root Device)
> cpus: Unknown device path type: 0
> cpus() enabled
> dev_phase5: bus_0(PCI_BUS: 0000) missing ops

^^^^^^^^^^
> domain_0(PCI_DOMAIN: 0000) enabled
> domain_0(PCI_DOMAIN: 0000) scanning...
> dev_phase3_scan: scanning domain_0(PCI_DOMAIN: 0000)

As a side note, I'd like to ask everybody working on v3 to read through
a complete boot log of his favourite board and ask for explanations if
he/she doesn't understand something or if something looks fishy. Sorting
the whole boot log and trying to explain duplicate lines is also very
interesting.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/