[coreboot] [PATCH] v3: fix PCI bus scan / device tree interaction
Carl-Daniel Hailfinger
c-d.hailfinger.devel.2006 at gmx.net
Sat Aug 30 04:15:59 CEST 2008
On 30.08.2008 00:53, Stefan Reinauer wrote:
> Carl-Daniel Hailfinger wrote:
>
>> IFF we only have one top-level PCI Bus (anything else is impossible with
>> only one Host Bridge) my patch is completely correct. However, IFF there
>> are multiple independent Host Bridges which do NOT share a PCI bus, we
>> need to implement a function which iterates over these Host Bridges.
>>
>>
>>
> Which happens on non-x86 systems and occasionally can happen on x86 PCIe.
>
How about this one? Tested on Qemu, fulfills your criteria. (The qemu
target needs to be fixed, though).
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Index: corebootv3-pci_scan_bus/device/pci_device.c
===================================================================
--- corebootv3-pci_scan_bus/device/pci_device.c (Revision 846)
+++ corebootv3-pci_scan_bus/device/pci_device.c (Arbeitskopie)
@@ -1196,8 +1196,24 @@
unsigned int pci_domain_scan_bus(struct device *dev, unsigned int max)
{
printk(BIOS_SPEW, "pci_domain_scan_bus: calling pci_scan_bus\n");
- /* There is only one link on this device, and it is always link 0. */
- return pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
+ /* There is only one link on a bus, and it is always link 0.
+ * dev->link[0] for a PCI domain is the domain link.
+ * The child of the domain link is the PCI bus device.
+ * We want to scan the bus link of the PCI bus device.
+ * dev->link[0].children->link[0] is that PCI bus link.
+ * If there can be multiple PCI buses directly below a PCI domain,
+ * we have to iterate over the PCI buses in a loop.
+ */
+#if 0
+ return pci_scan_bus(&dev->link[0].children->link[0],
+ PCI_DEVFN(0, 0), 0xff, max);
+#else
+ struct device *list;
+ for (list = dev; list; list = list->sibling)
+ max = pci_scan_bus(&list->link[0].children->link[0],
+ PCI_DEVFN(0, 0), 0xff, max);
+ return max;
+#endif
}
/**
--
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