[coreboot] r3837 - trunk/coreboot-v2/src/southbridge/amd/sb600
svn at coreboot.org
svn at coreboot.org
Tue Dec 23 03:22:07 CET 2008
Author: hailfinger
Date: 2008-12-23 03:22:07 +0100 (Tue, 23 Dec 2008)
New Revision: 3837
Modified:
trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_reset.c
Log:
Fix implicit declarations of pci_read_config32 and pci_write_config32 in
the SB600 code.
Signed-off-by: Maggie Li <Maggie.li at amd.com>
Reviewed-by: Zheng bao <Zheng.bao at amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_reset.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_reset.c 2008-12-23 02:05:55 UTC (rev 3836)
+++ trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_reset.c 2008-12-23 02:22:07 UTC (rev 3837)
@@ -26,6 +26,30 @@
typedef u32 device_t;
+static void pci_write_config8(device_t dev, unsigned where, unsigned char value)
+{
+ unsigned addr;
+ addr = (dev>>4) | where;
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ outb(value, 0xCFC + (addr & 3));
+}
+
+static void pci_write_config32(device_t dev, unsigned where, unsigned value)
+{
+ unsigned addr;
+ addr = (dev>>4) | where;
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ outl(value, 0xCFC);
+}
+
+static unsigned pci_read_config32(device_t dev, unsigned where)
+{
+ unsigned addr;
+ addr = (dev>>4) | where;
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ return inl(0xCFC);
+}
+
#include "../../../northbridge/amd/amdk8/reset_test.c"
void hard_reset(void)
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