[coreboot] Run PCI rom before PCI bus scan??

[Peter Stuge]

On Fri, Feb 08, 2008 at 08:55:50AM -0500, joe at smittys.pointclark.net wrote:
> >> 1: set up csr memory/io base in the nic. ami bios uses 0xff7ff000
> >> for mem base, and 0xdc01 as io base, these values should work to
> >> test with.
> 
> I think your right Corey, we need to setup space for for the CSR
> register first:
> 
> Control/Status Register (CSR) Accesses
> The integrated LAN controller supports zero wait-state single cycle
> memory or I/O mapped accesses to its CSR space. Separate BARs
> request 4 KB of memory space and 64 bytes of I/O space to
> accomplish this.

This is unfortunately at a later point in time. Anything to do with
CSR needs PCI config registers to be working properly. One hint is
"BARs" - Base Address Registers, which are stored in PCI config
registers.

Sorry I keep shooting down ideas. :\


//Peter