[coreboot] [PATCH] v3: Nuke superfluous comments for C beginners
Carl-Daniel Hailfinger
c-d.hailfinger.devel.2006 at gmx.net
Wed Feb 13 14:44:57 CET 2008
Nuke superfluous comments for C beginners in for loops.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Index: LinuxBIOSv3-cosmetic/southbridge/amd/cs5536/cs5536.c
===================================================================
--- LinuxBIOSv3-cosmetic/southbridge/amd/cs5536/cs5536.c (Revision 588)
+++ LinuxBIOSv3-cosmetic/southbridge/amd/cs5536/cs5536.c (Arbeitskopie)
@@ -492,7 +492,7 @@
if (!IsS3Resume())
{
struct acpi_init *aci = acpi_init_table;
- for (/* Nothing */; aci->ioreg; aci++) {
+ for (; aci->ioreg; aci++) {
outl(aci->regdata, aci->ioreg);
inl(aci->ioreg);
}
@@ -517,7 +517,7 @@
wrmsr(GLPCI_SB_CTRL, msr);
csi = SB_MASTER_CONF_TABLE;
- for (/* Nothing */; csi->msrnum; csi++) {
+ for (; csi->msrnum; csi++) {
msr.lo = csi->msr.lo;
msr.hi = csi->msr.hi;
wrmsr(csi->msrnum, msr);
@@ -533,7 +533,7 @@
/* TODO: Why the extra block here? Can it be removed? */
{
csi = CS5536_CLOCK_GATING_TABLE;
- for (/* Nothing */; csi->msrnum; csi++) {
+ for (; csi->msrnum; csi++) {
msr.lo = csi->msr.lo;
msr.hi = csi->msr.hi;
wrmsr(csi->msrnum, msr);
Index: LinuxBIOSv3-cosmetic/northbridge/amd/geodelx/geodelxinit.c
===================================================================
--- LinuxBIOSv3-cosmetic/northbridge/amd/geodelx/geodelxinit.c (Revision 588)
+++ LinuxBIOSv3-cosmetic/northbridge/amd/geodelx/geodelxinit.c (Arbeitskopie)
@@ -471,7 +471,7 @@
struct msr msr;
struct msrinit *gating = clock_gating_default;
- for (/* Nothing */; gating->msrnum != 0xffffffff; gating++) {
+ for (; gating->msrnum != 0xffffffff; gating++) {
msr = rdmsr(gating->msrnum);
msr.hi |= gating->msr.hi;
msr.lo |= gating->msr.lo;
@@ -487,7 +487,7 @@
struct msr msr;
struct msrinit *prio = geode_link_priority_table;
- for (/* Nothing */; prio->msrnum != 0xffffffff; prio++) {
+ for (; prio->msrnum != 0xffffffff; prio++) {
msr = rdmsr(prio->msrnum);
msr.hi |= prio->msr.hi;
msr.lo &= ~0xfff;
@@ -539,7 +539,7 @@
}
/* Load up C000 settings in eax. */
- for (/* Nothing */; bit; bit--) {
+ for (; bit; bit--) {
msr.lo <<= 8;
msr.lo |= 1; /* Cache disable PCI/Shadow memory. */
if (shadowByte && (1 << bit))
@@ -559,7 +559,7 @@
}
/* Load up E000 settings in eax. */
- for (/* Nothing */; bit; bit--) {
+ for (; bit; bit--) {
msr.lo <<= 8;
msr.lo |= 1; /* Cache disable PCI/Shadow memory. */
if (shadowByte && (1 << bit))
--
http://www.hailfinger.org/
More information about the coreboot
mailing list