[coreboot] patch: dbe62

[Peter Stuge]

On Thu, Feb 28, 2008 at 02:41:15PM -0800, ron minnich wrote:
> +++ mainboard/artecgroup/dbe62/Kconfig	(revision 0)
> +config MAINBOARD_NAME
> +	string
> +	default artecgroup/dbe62
> +	depends BOARD_ARTECGROUP_DBE62
> +	help
> +	  This is the default mainboard name.

What's a default name?


> +void hardware_stage1(void)
> +{
> +	post_code(POST_START_OF_MAIN);
> +
> +	dbe62_msr_init();
> +
> +	cs5536_stage1();
> +
> +	/*
> +	 * NOTE: Must do this AFTER the early_setup! It is counting on some
> +	 * early MSR setup for the CS5536.
> +	 */
> +	cs5536_setup_onchipuart();
> +}

What early_setup?! Please fix this comment in all boards before it
is copypasted again. I'll do it if someone tells me where this early
MSR setup is done now. dbe62_msr_init() ?


> +void mainboard_pre_payload(void)
> +{
> +	geode_pre_payload();
> +	banner(BIOS_DEBUG, "mainboard_pre_payload: done");
> +}

Why do we need this mainboard code when it is only calling a
function that can be determined using the dts?


> +++ mainboard/artecgroup/dbe62/irq_tables.c	(revision 0)

The final frontier.


> +unsigned long write_pirq_routing_table(unsigned long addr)

What an abomination. hint hint ;)

Can this code really not live in northbridge/ ?


> +/{
> +	mainboard-vendor = "Artec";
> +	mainboard-name = "DBE62";
..

> +			/* LPC IRQ polarity. Each bit is an IRQ 0-15. */
> +			lpc_serirq_polarity = "0x0000EFFD";
> +			/* 0:continuous 1:quiet */
> +			lpc_serirq_mode = "1";
> +			/* GPIO(0-0x20) for INT D:C:B:A, 0xFF=none. 
> +			 * See virtual PIC spec. */
> +			enable_gpio_int_route = "0x0D0C0700";

Yes! So completely on track. :)


//Peter