[coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F).
c-d.hailfinger.devel.2006 at gmx.net
Fri Jan 18 23:06:37 CET 2008
On 18.01.2008 21:09, Ronald Hoogenboom wrote:
> OK, I've checked it again and fixed a few things, see the read function
> and the erase also has the block protect disable, and it works again.
Thanks! It seems I was half asleep while coding the if (size > 512k) part.
> It takes just under a minute to flash the whole chip, which is still
> quite acceptable, I would say. It took WAY longer when the byte write
> was timed by usleep instead of the myusec_delay.
Yes, speed was not the primary concern when developing the code, it was
mostly about getting the code into a working state with maximum
adherence to the datasheets.
> Are there any more chips that need the block protect disable?
> Are these block protect bits always at the same position in the status
As far as I know, almost all chips have the block protect bits in the
same place in the status register. I can verify that later with some of
the data sheets on my disk.
More information about the coreboot