[coreboot] bug in geodelx dram setup code in v3?
rminnich at gmail.com
Mon Jul 28 07:11:11 CEST 2008
On Fri, Jul 11, 2008 at 3:56 PM, Marc Jones <Marc.Jones at amd.com> wrote:
> ron minnich wrote:
>> There's no support here for a non-terminated bus! Just that one comment.
>> * Settings for single DIMM and no VTT termination (like DB800 platform)
>> * 0xF2F100FF 0x56960004
>> Does this mean 1 DIMM, any number of devs? This is not clear.
> Yes, see the table in v2. There isn't code in v2 either. I'll work something
> up next week.
>> A change:
>> static void set_delay_control(u8 dimm0, u8 dimm1, int terminated)
>> terminated is 0 if there is no termination. Then set 4c00000f accordingly?
> Seems reasonable.
-------------- next part --------------
A non-text attachment was scrubbed...
Size: 6734 bytes
Desc: not available
More information about the coreboot