[coreboot] v2[PATCH]RCA RM4100 i82830 support

joe at smittys.pointclark.net joe at smittys.pointclark.net
Wed Mar 5 05:37:13 CET 2008


I hate to say it Corey, but this just sends it into an infinite loop.  
Does it make a difference that the onboard memory is located in slot2  
and slot1 is empty? Here is what I have:

Thanks - Joe

static void do_ram_command(const struct mem_controller *ctrl, uint32_t  
command, uint32_t addr_offset)
{
	int i;
	uint8_t reg8;
	uint32_t reg32;

	/* Configure the RAM command. */
	reg32 = pci_read_config32(ctrl->d0, DRC);
	/* Clear bits 29, 10-8, 6-4. */
	reg32 &= 0xdffff88f;
	reg32 |= command << 4;
       /* If RAM_COMMAND_NORMAL set the refresh mode and IC bit. */
	if (command == RAM_COMMAND_NORMAL) {
	reg32 |= ((RAM_COMMAND_REFRESH << 8) | (RAM_COMMAND_IC << 29));
       }
	pci_write_config32(ctrl->d0, DRC, reg32);

	/* RAM_COMMAND_NORMAL affects only the memory controller and
	   doesn't need to be "sent" to the DIMMs. */
	/* if (command == RAM_COMMAND_NORMAL) return; */

	PRINT_DEBUG("    Sending RAM command 0x");
	PRINT_DEBUG_HEX32(reg32);
	PRINT_DEBUG(" to 0x");
	PRINT_DEBUG_HEX32(0 + addr_offset);
	PRINT_DEBUG("\r\n");

	/* NOTE: Dual-sided ready */
	read32(0 + addr_offset);
	for(i = 0; i < ARRAY_SIZE(ctrl->channel0); i++) {
		reg8 = pci_read_config8(ctrl->d0, DRB + i);
		read32(((reg8 * 32) * 1024) * 1024);
	}
}




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