[coreboot] .. Re: .. Re: Via epia
jtd
jtd at mtnl.net.in
Thu Mar 20 14:35:07 CET 2008
On Thursday 20 March 2008 04:52 pm, jtd wrote:
>
> Now to check the config.lb with lspci -v.
> Also do i need an irq-tables.c generated for my board?
Here is the result of getpir
const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */
32+16*5, /* There can be total 5 devices on the bus */
0x00, /* Where the interrupt router lies (bus) */
(0x11<<3)|0x0, /* Where the interrupt router lies (dev) */
0xc20, /* IRQs devoted exclusively to PCI usage */
0x1106, /* Vendor */
0x596, /* Device */
0, /* Crap (miniport) */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
0xb3, /* u8 checksum. This has to be set to some
value that would give 0 after the sum of
all
bytes for this structure (including
checksum) */
{
/* bus, dev|fn, {link, bitmap}, {link, bitmap},
{link, bitmap}, {link, bitmap}, slot, rfu */
{0x00,(0x08<<3)|0x0, {{0x01, 0x0eb8}, {0x02, 0x0eb8},
{0x03, 0x0eb8}, {0x05, 0x00eb8}}, 0x1, 0x0},
{0x00,(0x0d<<3)|0x0, {{0x03, 0x0eb8}, {0x05, 0x0eb8},
{0x01, 0x0eb8}, {0x02, 0x00eb8}}, 0x2, 0x0},
{0x00,(0x11<<3)|0x0, {{0x00, 0x0eb8}, {0x00, 0x0eb8},
{0x03, 0x0eb8}, {0x05, 0x00eb8}}, 0x0, 0x0},
{0x00,(0x01<<3)|0x0, {{0x01, 0x0eb8}, {0x02, 0x0eb8},
{0x03, 0x0eb8}, {0x05, 0x00eb8}}, 0x0, 0x0},
{0x00,(0x10<<3)|0x0, {{0x01, 0x0eb8}, {0x02, 0x0eb8},
{0x03, 0x0eb8}, {0x05, 0x00eb8}}, 0x0, 0x0},
}
};
Which is quite different from the epia and the epia-m
--
Rgds
JTD
More information about the coreboot
mailing list