[coreboot] libpayload: Fix upper 128 NVRAM bytes handling

Jordan Crouse jordan.crouse at amd.com
Mon Mar 31 18:03:44 CEST 2008


On 31/03/08 17:37 +0200, Uwe Hermann wrote:
> On Sat, Mar 29, 2008 at 10:07:34AM +0100, Paul Menzel wrote:
> > According to [1] there are no spaces used before and after a dash.
> 
> Fixed.
> 
> Attached is an updated patch against the latest svn, with s/CMOS/NVRAM/.
> 
> 
> Uwe.
> -- 
> http://www.hermann-uwe.de  | http://www.holsham-traders.de
> http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

> Fix the NVRAM access functions to work correctly for the
> upper 128 bytes of NVRAM (if enabled).
> 
> For most chipsets this means using I/O ports 0x72/0x73, but at least
> on some VIA chipsets (I tested the VIA VT8237R on actual hardware)
> these ports won't work and you have to use 0x74/0x75. Thus, make this
> a Kconfig option for now.
> 
> Signed-off-by: Uwe Hermann <uwe at hermann-uwe.de>
Acked-by: Jordan Crouse <jordan.crouse at amd.com>

> Index: curses/Makefile.inc
> ===================================================================
> --- curses/Makefile.inc	(Revision 3198)
> +++ curses/Makefile.inc	(Arbeitskopie)
> @@ -27,7 +27,7 @@
>  ## SUCH DAMAGE.
>  ##
>  
> -TARGETS-$(CONFIG_TINYCURSES) += curses/keyboard.o 
> +TARGETS-$(CONFIG_TINYCURSES) += curses/keyboard.o
>  TARGETS-$(CONFIG_TINYCURSES) += curses/tinycurses.o
>  TARGETS-$(CONFIG_TINYCURSES) += curses/speaker.o
>  TARGETS-$(CONFIG_TINYCURSES) += curses/colors.o
> Index: Config.in
> ===================================================================
> --- Config.in	(Revision 3201)
> +++ Config.in	(Arbeitskopie)
> @@ -72,6 +72,22 @@
>  	bool "Support for reading/writing NVRAM bytes"
>  	default y
>  
> +config RTC_PORT_EXTENDED_VIA
> +	bool "Extended RTC ports are 0x74/0x75"
> +	default n
> +	help
> +	  For recent chipsets with 256 NVRAM bytes, you have to access the
> +	  upper 128 bytes (128-255) using two different I/O ports,
> +	  usually 0x72/0x73.
> +	
> +	  On some chipsets this can be a different set of ports, though.
> +	  The VIA VT8237R for example only recognizes the ports 0x74/0x75
> +	  for accessing the high 128 NVRAM bytes (as seems to be the case for
> +	  multiple VIA chipsets).
> +	
> +	  If you want to read or write CMOS bytes on computers with one of
> +	  these chipsets, say 'y' here.
> +
>  endmenu
>  
>  menu "Build Options"
> Index: drivers/nvram.c
> ===================================================================
> --- drivers/nvram.c	(Revision 3200)
> +++ drivers/nvram.c	(Arbeitskopie)
> @@ -42,9 +42,31 @@
>  
>  #include <libpayload.h>
>  
> -#define RTC_PORT 0x70
>  
>  /**
> + * PCs can have either 64 (very old ones), 128, or 256 bytes of CMOS RAM.
> + *
> + * Usually you access the lower 128 CMOS bytes via I/O port 0x70/0x71.
> + * For more recent chipsets with 256 bytes, you have to access the upper
> + * 128 bytes (128-255) using two different registers, usually 0x72/0x73.
> + *
> + * On some chipsets this can be different, though. The VIA VT8237R for example
> + * only recognizes the ports 0x74/0x75 for accessing the high 128 CMOS bytes
> + * (as seems to be the case for multiple VIA chipsets).
> + *
> + * It's very chipset-specific if and how the upper 128 bytes are enabled at
> + * all, but this work should be done in coreboot anyway. Libpayload assumes
> + * that coreboot has properly enabled access to the upper 128 bytes and
> + * doesn't try to do this on its own.
> + */
> +#define RTC_PORT_STANDARD      0x70
> +#ifdef CONFIG_RTC_PORT_EXTENDED_VIA
> +#define RTC_PORT_EXTENDED      0x74
> +#else
> +#define RTC_PORT_EXTENDED      0x72
> +#endif
> +
> +/**
>   * Read a byte from the specified NVRAM address.
>   * 
>   * @param addr The NVRAM address to read a byte from.
> @@ -52,8 +74,10 @@
>   */
>  u8 nvram_read(u8 addr)
>  {
> -	outb(addr, RTC_PORT);
> -	return inb(RTC_PORT + 1);
> +	u16 rtc_port = addr < 128 ? RTC_PORT_STANDARD : RTC_PORT_EXTENDED;
> +
> +	outb(addr, rtc_port);
> +	return inb(rtc_port + 1);
>  }
>  
>  /**
> @@ -64,6 +88,8 @@
>   */
>  void nvram_write(u8 val, u8 addr)
>  {
> -	outb(addr, RTC_PORT);
> -	outb(val, RTC_PORT + 1);
> +	u16 rtc_port = addr < 128 ? RTC_PORT_STANDARD : RTC_PORT_EXTENDED;
> +
> +	outb(addr, rtc_port);
> +	outb(val, rtc_port + 1);
>  }

> -- 
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> coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot

-- 
Jordan Crouse
Systems Software Development Engineer 
Advanced Micro Devices, Inc.





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