[coreboot] [flashrom] unusual SST39SF020 chip

Andriy Gapon avg at icyb.net.ua
Fri May 16 10:27:03 CEST 2008


on 15/05/2008 13:24 Stefan Reinauer said the following:
> What's the mainboard? Maybe the mainboard protects the chip with an 
> additional GPIO line.

Yes, this turned out to be the case.
I glimpsed "somewhere" that on this motherboard value in IO register 
0x4037 has to be and-ed with 0xef to enable writing to BIOS area (i.e. 
bit 4 has to be cleared).
In my particular configuration 0x4000 is power-management IO base of 
PIIX4. And PIIX4 spec says that registers 0x34-37 control GPO signals 
(general purpose outputs). So this would make it, what, GPO28.

I did that and:
$ ./flashrom -r -v -f bios.3.dd
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel PIIX4/4E/4M", enabling flash write... OK.
SST39SF020A found at physical address 0xfffc0000.
Flash part is SST39SF020A (256 KB).
===
This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE
Please email a report to flashrom at coreboot.org if any of the above 
operations
work correctly for you with this flash part. Please include the full output
from the program, including chipset found. Thank you for your help!
===
Reading Flash...done
Verifying flash... VERIFIED.

-- 
Andriy Gapon




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