[coreboot] r3344 - trunk/util/flashrom
svn at coreboot.org
svn at coreboot.org
Thu May 22 15:22:45 CEST 2008
Author: hailfinger
Date: 2008-05-22 15:22:45 +0200 (Thu, 22 May 2008)
New Revision: 3344
Modified:
trunk/util/flashrom/Makefile
trunk/util/flashrom/board_enable.c
trunk/util/flashrom/chipset_enable.c
trunk/util/flashrom/flash.h
trunk/util/flashrom/flashrom.c
trunk/util/flashrom/it87spi.c
Log:
Changes to make flashrom compile (and work) on FreeBSD.
This patch addresses different argument order of outX() calls,
FreeBSD-specific headers, difference in certain type names and system
interface names, and also FreeBSD-specific way of gaining IO port
access.
Signed-off-by: Andriy Gapon <avg at icyb.net.ua>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Modified: trunk/util/flashrom/Makefile
===================================================================
--- trunk/util/flashrom/Makefile 2008-05-21 22:10:38 UTC (rev 3343)
+++ trunk/util/flashrom/Makefile 2008-05-22 13:22:45 UTC (rev 3344)
@@ -19,6 +19,10 @@
LDFLAGS = -lpci -lz
STRIP_ARGS = -s
endif
+ifeq ($(OS_ARCH), FreeBSD)
+CFLAGS += -I/usr/local/include
+LDFLAGS += -L/usr/local/lib
+endif
OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.c \
sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \
Modified: trunk/util/flashrom/board_enable.c
===================================================================
--- trunk/util/flashrom/board_enable.c 2008-05-21 22:10:38 UTC (rev 3343)
+++ trunk/util/flashrom/board_enable.c 2008-05-22 13:22:45 UTC (rev 3344)
@@ -37,36 +37,36 @@
/* Enter extended functions */
static void w836xx_ext_enter(uint16_t port)
{
- outb(0x87, port);
- outb(0x87, port);
+ OUTB(0x87, port);
+ OUTB(0x87, port);
}
/* Leave extended functions */
static void w836xx_ext_leave(uint16_t port)
{
- outb(0xAA, port);
+ OUTB(0xAA, port);
}
/* General functions for reading/writing Winbond Super I/Os. */
static unsigned char wbsio_read(uint16_t index, uint8_t reg)
{
- outb(reg, index);
- return inb(index + 1);
+ OUTB(reg, index);
+ return INB(index + 1);
}
static void wbsio_write(uint16_t index, uint8_t reg, uint8_t data)
{
- outb(reg, index);
- outb(data, index + 1);
+ OUTB(reg, index);
+ OUTB(data, index + 1);
}
static void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask)
{
uint8_t tmp;
- outb(reg, index);
- tmp = inb(index + 1) & ~mask;
- outb(tmp | (data & mask), index + 1);
+ OUTB(reg, index);
+ tmp = INB(index + 1) & ~mask;
+ OUTB(tmp | (data & mask), index + 1);
}
/**
@@ -172,9 +172,9 @@
base = pci_read_word(dev, 0x88) & 0xFF80;
/* Enable GPIO15 which is connected to write protect. */
- val = inb(base + 0x4D);
+ val = INB(base + 0x4D);
val |= 0x80;
- outb(val, base + 0x4D);
+ OUTB(val, base + 0x4D);
return 0;
}
@@ -249,14 +249,14 @@
#define ASUSP5A_LOOP 5000
- outb(0x00, 0xE807);
- outb(0xEF, 0xE803);
+ OUTB(0x00, 0xE807);
+ OUTB(0xEF, 0xE803);
- outb(0xFF, 0xE800);
+ OUTB(0xFF, 0xE800);
for (i = 0; i < ASUSP5A_LOOP; i++) {
- outb(0xE1, 0xFF);
- if (inb(0xE800) & 0x04)
+ OUTB(0xE1, 0xFF);
+ if (INB(0xE800) & 0x04)
break;
}
@@ -265,13 +265,13 @@
return -1;
}
- outb(0x20, 0xE801);
- outb(0x20, 0xE1);
+ OUTB(0x20, 0xE801);
+ OUTB(0x20, 0xE1);
- outb(0xFF, 0xE802);
+ OUTB(0xFF, 0xE802);
for (i = 0; i < ASUSP5A_LOOP; i++) {
- tmp = inb(0xE800);
+ tmp = INB(0xE800);
if (tmp & 0x70)
break;
}
@@ -281,24 +281,24 @@
return -1;
}
- tmp = inb(0xE804);
+ tmp = INB(0xE804);
tmp &= ~0x02;
- outb(0x00, 0xE807);
- outb(0xEE, 0xE803);
+ OUTB(0x00, 0xE807);
+ OUTB(0xEE, 0xE803);
- outb(tmp, 0xE804);
+ OUTB(tmp, 0xE804);
- outb(0xFF, 0xE800);
- outb(0xE1, 0xFF);
+ OUTB(0xFF, 0xE800);
+ OUTB(0xE1, 0xFF);
- outb(0x20, 0xE801);
- outb(0x20, 0xE1);
+ OUTB(0x20, 0xE801);
+ OUTB(0x20, 0xE1);
- outb(0xFF, 0xE802);
+ OUTB(0xFF, 0xE802);
for (i = 0; i < ASUSP5A_LOOP; i++) {
- tmp = inb(0xE800);
+ tmp = INB(0xE800);
if (tmp & 0x70)
break;
}
@@ -316,9 +316,9 @@
uint8_t byte;
/* Set GPIO lines in the Broadcom HT-1000 southbridge. */
- outb(0x45, 0xcd6);
- byte = inb(0xcd7);
- outb(byte | 0x20, 0xcd7);
+ OUTB(0x45, 0xcd6);
+ byte = INB(0xcd7);
+ OUTB(byte | 0x20, 0xcd7);
return 0;
}
@@ -331,13 +331,13 @@
uint8_t tmp;
/* Raise GPIO22. */
- tmp = inb(0x4036);
- outb(tmp, 0xEB);
+ tmp = INB(0x4036);
+ OUTB(tmp, 0xEB);
tmp |= 0x40;
- outb(tmp, 0x4036);
- outb(tmp, 0xEB);
+ OUTB(tmp, 0x4036);
+ OUTB(tmp, 0xEB);
return 0;
}
@@ -360,10 +360,10 @@
/* Use GPIOBASE register to find where the GPIO is mapped. */
port = (pci_read_word(dev, 0x58) & 0xFFC0) + 0xE;
- val = inb(port);
+ val = INB(port);
val |= 0x80; /* Top Block Lock -- pin 8 of PLCC32 */
val |= 0x40; /* Lower Blocks Lock -- pin 7 of PLCC32 */
- outb(val, port);
+ OUTB(val, port);
return 0;
}
@@ -449,7 +449,7 @@
/* Use GPIOBASE register to find where the GPIO is mapped. */
gpiobar = pci_read_word(dev, 0x48) & 0xfffc;
- val = inl(gpiobar + ICH7_GPIO_LVL2); /* GP_LVL2 */
+ val = INL(gpiobar + ICH7_GPIO_LVL2); /* GP_LVL2 */
printf_debug("\nGPIOBAR=0x%04x GP_LVL: 0x%08x\n", gpiobar, val);
/* bit 2 (0x04) = 0 #TBL --> bootblock locking = 1
@@ -462,7 +462,7 @@
*/
val |= (1 << 2) | (1 << 3);
- outl(val, gpiobar + ICH7_GPIO_LVL2);
+ OUTL(val, gpiobar + ICH7_GPIO_LVL2);
return 0;
}
Modified: trunk/util/flashrom/chipset_enable.c
===================================================================
--- trunk/util/flashrom/chipset_enable.c 2008-05-21 22:10:38 UTC (rev 3343)
+++ trunk/util/flashrom/chipset_enable.c 2008-05-22 13:22:45 UTC (rev 3344)
@@ -65,37 +65,37 @@
/* The same thing on SiS 950 Super I/O side... */
/* First probe for Super I/O on config port 0x2e. */
- outb(0x87, 0x2e);
- outb(0x01, 0x2e);
- outb(0x55, 0x2e);
- outb(0x55, 0x2e);
+ OUTB(0x87, 0x2e);
+ OUTB(0x01, 0x2e);
+ OUTB(0x55, 0x2e);
+ OUTB(0x55, 0x2e);
- if (inb(0x2f) != 0x87) {
+ if (INB(0x2f) != 0x87) {
/* If that failed, try config port 0x4e. */
- outb(0x87, 0x4e);
- outb(0x01, 0x4e);
- outb(0x55, 0x4e);
- outb(0xaa, 0x4e);
- if (inb(0x4f) != 0x87) {
+ OUTB(0x87, 0x4e);
+ OUTB(0x01, 0x4e);
+ OUTB(0x55, 0x4e);
+ OUTB(0xaa, 0x4e);
+ if (INB(0x4f) != 0x87) {
printf("Can not access SiS 950\n");
return -1;
}
- outb(0x24, 0x4e);
- b = inb(0x4f) | 0xfc;
- outb(0x24, 0x4e);
- outb(b, 0x4f);
- outb(0x02, 0x4e);
- outb(0x02, 0x4f);
+ OUTB(0x24, 0x4e);
+ b = INB(0x4f) | 0xfc;
+ OUTB(0x24, 0x4e);
+ OUTB(b, 0x4f);
+ OUTB(0x02, 0x4e);
+ OUTB(0x02, 0x4f);
}
- outb(0x24, 0x2e);
- printf("2f is %#x\n", inb(0x2f));
- b = inb(0x2f) | 0xfc;
- outb(0x24, 0x2e);
- outb(b, 0x2f);
+ OUTB(0x24, 0x2e);
+ printf("2f is %#x\n", INB(0x2f));
+ b = INB(0x2f) | 0xfc;
+ OUTB(0x24, 0x2e);
+ OUTB(b, 0x2f);
- outb(0x02, 0x2e);
- outb(0x02, 0x2f);
+ OUTB(0x02, 0x2e);
+ OUTB(0x02, 0x2f);
return 0;
}
@@ -522,13 +522,13 @@
pci_write_byte(dev, 0x48, tmp);
/* Now become a bit silly. */
- tmp = inb(0xc6f);
- outb(tmp, 0xeb);
- outb(tmp, 0xeb);
+ tmp = INB(0xc6f);
+ OUTB(tmp, 0xeb);
+ OUTB(tmp, 0xeb);
tmp |= 0x40;
- outb(tmp, 0xc6f);
- outb(tmp, 0xeb);
- outb(tmp, 0xeb);
+ OUTB(tmp, 0xc6f);
+ OUTB(tmp, 0xeb);
+ OUTB(tmp, 0xeb);
return 0;
}
Modified: trunk/util/flashrom/flash.h
===================================================================
--- trunk/util/flashrom/flash.h 2008-05-21 22:10:38 UTC (rev 3343)
+++ trunk/util/flashrom/flash.h 2008-05-22 13:22:45 UTC (rev 3344)
@@ -30,6 +30,25 @@
#include <stdint.h>
#include <stdio.h>
+#ifdef __FreeBSD__
+ #include <machine/cpufunc.h>
+ #define off64_t off_t
+ #define lseek64 lseek
+ #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
+ #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
+ #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
+ #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
+ #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
+ #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
+#else
+ #define OUTB outb
+ #define OUTW outw
+ #define OUTL outl
+ #define INB inb
+ #define INW inw
+ #define INL inl
+#endif
+
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
struct flashchip {
Modified: trunk/util/flashrom/flashrom.c
===================================================================
--- trunk/util/flashrom/flashrom.c 2008-05-21 22:10:38 UTC (rev 3343)
+++ trunk/util/flashrom/flashrom.c 2008-05-22 13:22:45 UTC (rev 3344)
@@ -252,6 +252,9 @@
int option_index = 0;
int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0;
int ret = 0, i;
+#ifdef __FreeBSD__
+ int io_fd;
+#endif
static struct option long_options[] = {
{"read", 0, 0, 'r'},
@@ -367,6 +370,8 @@
/* First get full io access */
#if defined (__sun) && (defined(__i386) || defined(__amd64))
if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
+#elif defined(__FreeBSD__)
+ if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
#else
if (iopl(3) != 0) {
#endif
@@ -559,5 +564,8 @@
if (verify_it)
ret |= verify_flash(flash, buf);
+#ifdef __FreeBSD__
+ close(io_fd);
+#endif
return ret;
}
Modified: trunk/util/flashrom/it87spi.c
===================================================================
--- trunk/util/flashrom/it87spi.c 2008-05-21 22:10:38 UTC (rev 3343)
+++ trunk/util/flashrom/it87spi.c 2008-05-22 13:22:45 UTC (rev 3344)
@@ -40,14 +40,14 @@
/* Generic Super I/O helper functions */
uint8_t regval(uint16_t port, uint8_t reg)
{
- outb(reg, port);
- return inb(port + 1);
+ OUTB(reg, port);
+ return INB(port + 1);
}
void regwrite(uint16_t port, uint8_t reg, uint8_t val)
{
- outb(reg, port);
- outb(val, port + 1);
+ OUTB(reg, port);
+ OUTB(val, port + 1);
}
/* Helper functions for most recent ITE IT87xx Super I/O chips */
@@ -55,13 +55,13 @@
#define CHIP_ID_BYTE2_REG 0x21
static void enter_conf_mode_ite(uint16_t port)
{
- outb(0x87, port);
- outb(0x01, port);
- outb(0x55, port);
+ OUTB(0x87, port);
+ OUTB(0x01, port);
+ OUTB(0x55, port);
if (port == ITE_SUPERIO_PORT1)
- outb(0x55, port);
+ OUTB(0x55, port);
else
- outb(0xaa, port);
+ OUTB(0xaa, port);
}
static void exit_conf_mode_ite(uint16_t port)
@@ -129,7 +129,7 @@
int i;
do {
- busy = inb(it8716f_flashport) & 0x80;
+ busy = INB(it8716f_flashport) & 0x80;
} while (busy);
if (readcnt > 3) {
printf("%s called with unsupported readcnt %i.\n",
@@ -138,27 +138,27 @@
}
switch (writecnt) {
case 1:
- outb(writearr[0], it8716f_flashport + 1);
+ OUTB(writearr[0], it8716f_flashport + 1);
writeenc = 0x0;
break;
case 2:
- outb(writearr[0], it8716f_flashport + 1);
- outb(writearr[1], it8716f_flashport + 7);
+ OUTB(writearr[0], it8716f_flashport + 1);
+ OUTB(writearr[1], it8716f_flashport + 7);
writeenc = 0x1;
break;
case 4:
- outb(writearr[0], it8716f_flashport + 1);
- outb(writearr[1], it8716f_flashport + 4);
- outb(writearr[2], it8716f_flashport + 3);
- outb(writearr[3], it8716f_flashport + 2);
+ OUTB(writearr[0], it8716f_flashport + 1);
+ OUTB(writearr[1], it8716f_flashport + 4);
+ OUTB(writearr[2], it8716f_flashport + 3);
+ OUTB(writearr[3], it8716f_flashport + 2);
writeenc = 0x2;
break;
case 5:
- outb(writearr[0], it8716f_flashport + 1);
- outb(writearr[1], it8716f_flashport + 4);
- outb(writearr[2], it8716f_flashport + 3);
- outb(writearr[3], it8716f_flashport + 2);
- outb(writearr[4], it8716f_flashport + 7);
+ OUTB(writearr[0], it8716f_flashport + 1);
+ OUTB(writearr[1], it8716f_flashport + 4);
+ OUTB(writearr[2], it8716f_flashport + 3);
+ OUTB(writearr[3], it8716f_flashport + 2);
+ OUTB(writearr[4], it8716f_flashport + 7);
writeenc = 0x3;
break;
default:
@@ -170,15 +170,15 @@
* Note:
* We can't use writecnt directly, but have to use a strange encoding.
*/
- outb(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
+ OUTB(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
if (readcnt > 0) {
do {
- busy = inb(it8716f_flashport) & 0x80;
+ busy = INB(it8716f_flashport) & 0x80;
} while (busy);
for (i = 0; i < readcnt; i++) {
- readarr[i] = inb(it8716f_flashport + 5 + i);
+ readarr[i] = INB(it8716f_flashport + 5 + i);
}
}
@@ -190,12 +190,12 @@
int i;
spi_write_enable();
- outb(0x06 , it8716f_flashport + 1);
- outb(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
+ OUTB(0x06 , it8716f_flashport + 1);
+ OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
for (i = 0; i < 256; i++) {
bios[256 * block + i] = buf[256 * block + i];
}
- outb(0, it8716f_flashport);
+ OUTB(0, it8716f_flashport);
/* Wait until the Write-In-Progress bit is cleared.
* This usually takes 1-10 ms, so wait in 1 ms steps.
*/
@@ -221,7 +221,7 @@
myusec_delay(10);
}
/* resume normal ops... */
- outb(0x20, it8716f_flashport);
+ OUTB(0x20, it8716f_flashport);
return 0;
}
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