[coreboot] [PATCH] artecgroup/dbe61: Set up 4MB mode for LPC dongle

[ron minnich]

Unless someone has a huge problem with this (I don't)

Acked-by: Ronald G. Minnich <rminnich at gmail.com>

so you're booting? Do we have your RAM setup commit?

ron

On Tue, May 27, 2008 at 5:30 PM, Mart Raudsepp
<mart.raudsepp at artecdesign.ee> wrote:
> artecgroup/dbe61: Set up 4MB mode for LPC dongle
>
> This way we can fit a kernel and initramfs on the dongle's free ~3.75MB space
> and have a debug system bootable right from inside the dongle. The start
> address of the dongle is mem at 0xffc00000 for FILO with 4MB minus ROM area
> available.
>
> This should be a no-op when not booting from the dongle.
>
> The same change was done to artecgroup/dbe62/stage1.c in rev660.
>
> Signed-off-by: Mart Raudsepp <mart.raudsepp at artecdesign.ee>
> ---
>  mainboard/artecgroup/dbe61/stage1.c |    3 +++
>  1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/mainboard/artecgroup/dbe61/stage1.c
> b/mainboard/artecgroup/dbe61/stage1.c
> index c159171..70fd82f 100644
> --- a/mainboard/artecgroup/dbe61/stage1.c
> +++ b/mainboard/artecgroup/dbe61/stage1.c
> @@ -60,6 +60,9 @@ void hardware_stage1(void)
>         * early MSR setup for the CS5536.
>         */
>        cs5536_setup_onchipuart(2);
> +
> +       /* Set up 4MB mode for Artec LPC Dongle (this should be a no-op when not
> booting from the dongle) */
> +       outb(0xf4,0x88);
>  }
>
>  void mainboard_pre_payload(void)
> --
> 1.5.4.5
>
>
>
> --
> coreboot mailing list
> coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>