[coreboot] SuperIO cleanup

[Myles Watson]

This patch makes it so there's not so much extra information in pnp_info.
IRQs and DRQs just need values.  It also moves enable to the end so it
doesn't look like it needs to be set in superio.c.  It just needs to be set
in the dts.  I decided that it makes sense to create a serial port and
keyboard by default.

It also makes a return value explicitly 1 or 0 instead of using !!.

It needs to be done for the other SuperIOs as well, but I'd like to get the
w83627hf to a good place before I update the others.  I'm fine with not
committing until we can agree on how to do this right.

Signed-off-by: Myles Watson <mylesgw at gmail.com>

Related note:

Could someone who understands how SuperIOs work comment on the duplicated
functions in superio.c?  (Uwe, you've added SuperIO support for several
chips)

pnp_read_index and friends look like they should go somewhere shared so we
don't have to update so much code every time we port a new SuperIO.

Are they standard but were static for romcc?  Are they specific to SuperIO
vendors?

Thanks,
Myles

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