[coreboot] tyan s2875 processor issues

Sat Nov 22 21:29:58 CET 2008

Hello everyone,

I've been working working on getting coreboot to run on a Tyan Tiger
S2875 with filo but have run into a problem coreboot can't seem to
initialize the second cpu. 

The boards running two AMD Opteron 250's. With the proprietary bios both
processors will show up under /proc/cpuinfo but under coreboot only 1
will. Coreboot's logs complain about being unable to start 'cpu 0x01'.

Looking through the list archives I saw a similiar problem with with a
Tyan S2882 but couldn't locate an answer. 

Below is the debugging output using SVN 3730, on debug level 8.

Any help would be appreciated. Thanks.

---------------------------------------------------

coreboot-2.0.0_Fallback Thu Jan  1 00:06:26 EST 2004 starting...
(0,1) link=01
(1,0) link=01
02 nodes initialized.
SBLink=00
NC node|link=00
ht reset -

coreboot-2.0.0_Fallback Thu Jan  1 00:06:26 EST 2004 starting...
(0,1) link=01
(1,0) link=01
02 nodes initialized.
SBLink=00
NC node|link=00
Ram1.00
Ram1.01
Ram2.00
Ram2.01
No memory for this cpu
Ram3
Initializing memory:  done
Ram4
v_esp=000cffe4
testx = 5a5a5a5a
Copying data from cache to RAM -- switching to use RAM as stack... Done
testx = 5a5a5a5a
Disabling cache as ram now 
Clearing initial memory region: Done
Uncompressing coreboot to RAM.
src=fffe0000
dst=00004000
coreboot_ram.nrv2b length = 0000da24
coreboot_ram.bin   length = 00026fac
Jumping to coreboot.
coreboot-2.0.0_Fallback Thu Jan  1 00:06:26 EST 2004 booting...
Enumerating buses...
APIC_CLUSTER: 0 enabled
PCI_DOMAIN: 0000 enabled
  PCI: 00:18.3 siblings=0
CPU: APIC: 00 enabled
PCI: 00:19.0 [1022/1100] enabled
PCI: 00:19.1 [1022/1101] enabled
PCI: 00:19.2 [1022/1102] enabled
PCI: 00:19.3 [1022/1103] enabled
  PCI: 00:19.3 siblings=0
CPU: APIC: 01 enabled
PCI: pci_scan_bus for bus 00
PCI: 00:18.0 [1022/1100] enabled
PCI: 00:18.1 [1022/1101] enabled
PCI: 00:18.2 [1022/1102] enabled
PCI: 00:18.3 [1022/1103] enabled
PCI: 00:19.0 [1022/1100] enabled
PCI: 00:19.1 [1022/1101] enabled
PCI: 00:19.2 [1022/1102] enabled
PCI: 00:19.3 [1022/1103] enabled
PCI: 01:00.0 [1022/7454] enabled
PCI: 01:01.0 [1022/7454] enabled next_unitid: 0004
PCI: 01:00.0 [1022/7460] enabled
PCI: 01:04.0 [1022/7460] enabled next_unitid: 0008
PCI: pci_scan_bus for bus 01
PCI: 01:01.0 [1022/7454] enabled
PCI: 01:02.0 [1022/7455] enabled
PCI: 01:04.0 [1022/7460] enabled
PCI: 01:05.0 [1022/7468] enabled
PCI: 01:05.1 [1022/7469] enabled
PCI: 01:05.2 [1022/746a] enabled
PCI: 01:05.3 [1022/746b] enabled
PCI: 01:05.5 [1022/746d] enabled
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [10de/0326] enabled
PCI: pci_scan_bus returning with max=002
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [1022/7464] enabled
PCI: 03:00.1 [1022/7464] enabled
PCI: 03:03.0 [8086/1076] enabled
PCI: 03:05.0 [1095/3114] enabled
PCI: 03:0a.0 [1106/3044] enabled
PCI: 03:0b.0 [1106/3038] enabled
PCI: 03:0b.1 [1106/3038] enabled
PCI: 03:0b.2 [1106/3104] enabled
PCI: pci_scan_bus returning with max=003
PNP: 002e.0 enabled
PNP: 002e.1 disabled
PNP: 002e.2 enabled
PNP: 002e.3 disabled
PNP: 002e.5 enabled
PNP: 002e.6 disabled
PNP: 002e.7 disabled
PNP: 002e.8 disabled
PNP: 002e.9 disabled
PNP: 002e.a disabled
PNP: 002e.b enabled
PCI: pci_scan_bus returning with max=003
PCI: pci_scan_bus returning with max=003
done
Allocating resources...
Reading resources...
PCI: 01:02.0 1c <- [0x00fffff000 - 0x00ffffefff] size 0x00000000 gran 0x0c bus 02 io
PCI: 01:04.0 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 03 prefmem
Done reading resources.
Allocating VGA resource PCI: 02:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 01:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Setting resources...
VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device
PCI: 00:18.0 1b8 <- [0x00e0000000 - 0x00f7ffffff] size 0x18000000 gran 0x14 prefmem <node 0 link 0>
PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000002fff] size 0x00002000 gran 0x0c io <node 0 link 0>
PCI: 00:18.0 1b0 <- [0x00fc000000 - 0x00fd2fffff] size 0x01300000 gran 0x14 mem <node 0 link 0>
PCI: 01:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 01:01.0 14 <- [0x00fd200000 - 0x00fd200000] size 0x00000001 gran 0x00 mem
PCI: 01:02.0 24 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x14 bus 02 prefmem
PCI: 01:02.0 20 <- [0x00fc000000 - 0x00fd0fffff] size 0x01100000 gran 0x14 bus 02 mem
PCI: 02:00.0 10 <- [0x00fc000000 - 0x00fcffffff] size 0x01000000 gran 0x18 mem
PCI: 02:00.0 14 <- [0x00f0000000 - 0x00f7ffffff] size 0x08000000 gran 0x1b prefmem
PCI: 02:00.0 30 <- [0x00fd000000 - 0x00fd01ffff] size 0x00020000 gran 0x11 romem
PCI: 01:04.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 01:04.0 20 <- [0x00fd100000 - 0x00fd1fffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 03:00.0 10 <- [0x00fd160000 - 0x00fd160fff] size 0x00001000 gran 0x0c mem
PCI: 03:00.1 10 <- [0x00fd161000 - 0x00fd161fff] size 0x00001000 gran 0x0c mem
PCI: 03:03.0 10 <- [0x00fd100000 - 0x00fd11ffff] size 0x00020000 gran 0x11 mem
PCI: 03:03.0 14 <- [0x00fd120000 - 0x00fd13ffff] size 0x00020000 gran 0x11 mem
PCI: 03:03.0 18 <- [0x0000001080 - 0x00000010bf] size 0x00000040 gran 0x06 io
PCI: 03:03.0 30 <- [0x00fd140000 - 0x00fd15ffff] size 0x00020000 gran 0x11 romem
PCI: 03:05.0 10 <- [0x0000001410 - 0x0000001417] size 0x00000008 gran 0x03 io
PCI: 03:05.0 14 <- [0x0000001430 - 0x0000001433] size 0x00000004 gran 0x02 io
PCI: 03:05.0 18 <- [0x0000001420 - 0x0000001427] size 0x00000008 gran 0x03 io
PCI: 03:05.0 1c <- [0x0000001440 - 0x0000001443] size 0x00000004 gran 0x02 io
PCI: 03:05.0 20 <- [0x0000001400 - 0x000000140f] size 0x00000010 gran 0x04 io
PCI: 03:05.0 24 <- [0x00fd163000 - 0x00fd1633ff] size 0x00000400 gran 0x0a mem
PCI: 03:05.0 30 <- [0x00fff80000 - 0x00ffffffff] size 0x00080000 gran 0x13 romem
PCI: 03:0a.0 10 <- [0x00fd162000 - 0x00fd1627ff] size 0x00000800 gran 0x0b mem
PCI: 03:0a.0 14 <- [0x0000001000 - 0x000000107f] size 0x00000080 gran 0x07 io
PCI: 03:0b.0 20 <- [0x00000010c0 - 0x00000010df] size 0x00000020 gran 0x05 io
PCI: 03:0b.1 20 <- [0x00000010e0 - 0x00000010ff] size 0x00000020 gran 0x05 io
PCI: 03:0b.2 10 <- [0x00fd164000 - 0x00fd1640ff] size 0x00000100 gran 0x08 mem
PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io
PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq
PCI: 01:05.1 20 <- [0x0000002860 - 0x000000286f] size 0x00000010 gran 0x04 io
PCI: 01:05.2 10 <- [0x0000002840 - 0x000000285f] size 0x00000020 gran 0x05 io
PCI: 01:05.3 58 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 01:05.5 10 <- [0x0000002400 - 0x00000024ff] size 0x00000100 gran 0x08 io
PCI: 01:05.5 14 <- [0x0000002800 - 0x000000283f] size 0x00000040 gran 0x06 io
PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
Done setting resources.
Done allocating resources.
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 01:01.0 subsystem <- 10f1/2875
PCI: 01:01.0 cmd <- 06
PCI: 01:02.0 bridge ctrl <- 000b
PCI: 01:02.0 cmd <- 07
PCI: 02:00.0 cmd <- 03
PCI: 01:04.0 bridge ctrl <- 0003
PCI: 01:04.0 cmd <- 07
PCI: 03:00.0 subsystem <- 10f1/2875
PCI: 03:00.0 cmd <- 02
PCI: 03:00.1 subsystem <- 10f1/2875
PCI: 03:00.1 cmd <- 02
PCI: 03:03.0 cmd <- 03
PCI: 03:05.0 subsystem <- 10f1/2875
PCI: 03:05.0 cmd <- 03
PCI: 03:0a.0 cmd <- 83
PCI: 03:0b.0 cmd <- 01
PCI: 03:0b.1 cmd <- 01
PCI: 03:0b.2 cmd <- 02
PCI: 01:05.0 subsystem <- 10f1/2875
PCI: 01:05.0 cmd <- 0f
w83627hf hwm smbus enabled
PCI: 01:05.1 subsystem <- 10f1/2875
PCI: 01:05.1 cmd <- 01
PCI: 01:05.2 subsystem <- 10f1/2875
PCI: 01:05.2 cmd <- 01
PCI: 01:05.3 subsystem <- 10f1/2875
PCI: 01:05.3 cmd <- 01
PCI: 01:05.5 subsystem <- 10f1/2875
PCI: 01:05.5 cmd <- 01
PCI: 00:18.1 subsystem <- 10f1/2875
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 10f1/2875
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
PCI: 00:19.0 cmd <- 00
PCI: 00:19.1 cmd <- 00
PCI: 00:19.2 cmd <- 00
PCI: 00:19.3 cmd <- 00
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
Initializing CPU #0
CPU: vendor AMD device f5a
CPU: family 0f, model 05, stepping 0a
Enabling cache

Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base:    0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
Setting variable MTRR 2, base: 3072MB, range:  512MB, type WB
DONE variable MTRRs
Clear out the extra MTRR's

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

microcode: equivalent rev id  = 0x004a, current patch id = 0x00000000
microcode: patch id to apply = 0x00000047
microcode: updated to patch id = 0x00000047  success

CPU model AMD Opteron(tm) Processor 250
Setting up local apic... apic_id: 0x00 done.
Clearing memory 2048K - 4194304K: --------------------------------------------------------------- done
CPU #0 Initialized
CPU 0x01 would not start!
CPU 0x01 did not initialize!
All AP CPUs stopped
PCI: 00:18.0 init
PCI: 01:02.0 init
PCI: 01:04.0 init
PCI: 03:05.0 init
rom address for PCI: 03:05.0 = fff80000
Incorrect Expansion ROM Header Signature 457f
PCI: 01:05.0 init
amd8111: ioapic bsp_apicid = 00
RTC Init
Invalid CMOS LB checksum
enabling HPET @0xfed00000
PNP: 002e.0 init
PNP: 002e.2 init
PNP: 002e.5 init
Keyboard init...
PNP: 002e.b init
PCI: 01:05.1 init
IDE1 IDE0 PCI: 01:05.3 init
set power on after power fail
PCI: 00:18.1 init
PCI: 00:18.2 init
PCI: 00:18.3 init
NB: Function 3 Misc Control.. done.
PCI: 00:19.0 init
PCI: 00:19.1 init
PCI: 00:19.2 init
PCI: 00:19.3 init
NB: Function 3 Misc Control.. done.
PCI: 02:00.0 init
rom address for PCI: 02:00.0 = fd000000
copying VGA ROM Image from 0xfd000000 to 0xc0000, 0xf800 bytes
entering emulator
halt_sys: file /home/doc/tars/core/trunk/coreboot-v2/src/devices/emulator/x86emu/ops.c, line 4387
PCI: 03:03.0 init
rom address for PCI: 03:03.0 = fd140000
Incorrect Expansion ROM Header Signature ffff
PCI: 03:0a.0 init
PCI: 03:0b.0 init
PCI: 03:0b.1 init
PCI: 03:0b.2 init
Devices initialized
Copying IRQ routing tables to 0xf0000...done.
Verifing copy of IRQ routing tables at 0xf0000...done
Checking IRQ routing table consistency...
check_pirq_routing_table() - irq_routing_table located at: 0x000f0000
/home/doc/tars/core/trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c:    37:check_pirq_routing_table() - checksum is: 0xcf but should be: 0xd0
done.
bus_isa=4
bus_8151_1=2
Wrote the mp table end at: 00000020 - 000001f0
Moving GDT to 0x500...ok
Adjust low_table_end from 0x00000530 to 0x00001000 
Adjust rom_table_end from 0x000f0400 to 0x00100000 
Wrote coreboot table at: 00000530 - 00000e38  checksum 917c

elfboot: Attempting to load payload.
rom_stream: 0xfffc0000 - 0xfffdffff
Found ELF candidate at offset 0
header_offset is 0
Try to load at offset 0x0
New segment addr 0x100000 size 0x39d270 offset 0xe0 filesize 0x159c0
(cleaned up) New segment addr 0x100000 size 0x39d270 offset 0xe0 filesize 0x159c0
New segment addr 0x49d280 size 0x48 offset 0x15aa0 filesize 0x48
(cleaned up) New segment addr 0x49d280 size 0x48 offset 0x15aa0 filesize 0x48
Dropping non PT_LOAD segment
Dropping non PT_LOAD segment
Dropping non PT_LOAD segment
Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000039d270 filesz: 0x00000000000159c0
Clearing Segment: addr: 0x00000000001159c0 memsz: 0x00000000003878b0
Loading Segment: addr: 0x000000000049d280 memsz: 0x0000000000000048 filesz: 0x0000000000000048
Jumping to boot code at 0x100080
FILO version 0.6.0rc1 (doc at darkstar) Thu Jan  1 00:03:58 EST 2004
ERROR: No such CMOS option (boot_devices)
Press <Enter> for default menu.lst (hda1:/boot/grub/menu.lst), or <Esc> for prompt... 1 timed out
menu: hda1:/boot/grub/menu.lst