[coreboot] Resource Allocator for v3
ron minnich
rminnich at gmail.com
Mon Nov 24 17:15:14 CET 2008
On Mon, Nov 24, 2008 at 7:01 AM, Myles Watson <mylesgw at gmail.com> wrote:
> if (resource->flags & IORESOURCE_IO) {
> /* Don't allow potential aliases over the legacy PCI
> * expansion card addresses. The legacy PCI decodes
> * only 10 bits, uses 0x100 - 0x3ff. Therefore, only
> * 0x00 - 0xff can be used out of each 0x400 block
> of
> * I/O space.
> */
> if ((base & 0x300) != 0) {
> base = (base & ~0x3ff) + 0x400;
> }
> /* Don't allow allocations in the VGA I/O range.
> * PCI has special cases for that.
> */
> else if ((base >= 0x3b0) && (base <= 0x3df)) {
> base = 0x3e0;
> }
> }
>
> It seems like I'm misreading this and/or the check isn't broad enough. If
> there are really devices claiming all IO where the last 10 bits decode to
> 0x300, then many more ranges should be affected. For example, a size 0x200
> allocation from 0x200-0x3ff doesn't trigger this check. Neither does a size
> 0x200 allocation from 0x1200 - 0x13ff, but a size 0x20 allocation from
> 0x1320-0x133f does.
I don't understand. 0x200 & 0x300 is non-zero. 0x200 will trigger it.
>
> My theory is that this only matters for devices that are subtractively
> decoding the address space. At least in the k8 case, the 0x1200-0x13ff
> range transactions will never conflict with the "legacy PCI" unless the
> device is on the southbridge. If it's anywhere else, the HT routing means
> that the southbridge will never see the transaction.
good point.
ron
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