[coreboot] Some v3 Kconfig options into dts?

[Peter Stuge]

Thanks for the cleanup Uwe! Reading it through I saw several options
that I think should be in dts files instead. Please comment.


svn at coreboot.org wrote:
>  config K8_SCAN_PCI_BUS
> +	  Whether to scan the PCI bus in stage1.
>  
>  config K8_ALLOCATE_IO_RANGE
> +	  Whether to allocate I/O space in stage1.
>  
>  config K8_ALLOCATE_MMIO_RANGE
> +	  Whether to allocate MMIO space in stage1.

We'll have to add some text about when any of these should be enabled
too. Later.


>  config LOGICAL_CPUS
> +	  How many logical CPUs there are. FIXME.
>  
>  config MAX_PHYSICAL_CPUS
> +	  Maximum number of physical CPUs (sockets).

dts?


>  config MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED
> +	  Config with 4 CPUs even if more are installed.

But I think this should stay in Kconfig.


>  config CROSS_BAR_47_56
> +	  Configure for the type of crossbar on the mainboard.

dts?


>  	help
>  	  This option is used to determine whether the mainboard has
> +	  a PIRQ table, which is the old way to set up interrupt routing.
>  	  It is usually set in mainboard/*/Kconfig.
>  
>  config ACPI_TABLE
>  	boolean
>  	help
>  	  This option is used to determine whether the mainboard has
> +	  an ACPI table.
>  	  It is usually set in mainboard/*/Kconfig.

dts?


>  config SMP

>  	depends CPU_I586 || CPU_AMD_K8
>  	default 0
>  	help
> +	  This option is used to enable certain functions to make coreboot
> +	  work correctly on symmetric multi processor systems.
>  	  It is usually set in mainboard/*/Kconfig.

Could this be derived from the number of logical CPUs?


>  config IOAPIC
> @@ -153,7 +152,7 @@
>  	depends ARCH_X86 && CPU_AMD_K8
>  	default 0
>  	help
> +	  If you want to configure an IOAPIC, set this.

Will the builder really have an opinion on this? Isn't it chip
dependent? (ie -> dts?)


>  config K8_HT_FREQ_1G_SUPPORT
> +	  1 GHz support. Opteron E0 or later can support 1G HT,
> +	  but still depends on the mainboard.

dts?


>  config HT_FREQ_800MHZ
> +	  Can we run HT at 800 MHz.

dts?


>  config USBDEBUG_DIRECT
>  	depends SOUTHBRIDGE_NVIDIA_MCP55

Chip specific and board specific so a chip dts setting that is
filtered through the board dts and can make a Kconfig option visible
that the builder can use to disabled USB debug output?


>  config APIC_ID_OFFSET
> +	  This is entirely mainboard dependent.

dts?


//Peter