[coreboot] r895 - coreboot-v3/northbridge/amd/k8

svn at coreboot.org svn at coreboot.org
Mon Oct 6 19:14:41 CEST 2008


Author: rminnich
Date: 2008-10-06 19:14:41 +0200 (Mon, 06 Oct 2008)
New Revision: 895

Added:
   coreboot-v3/northbridge/amd/k8/get_nodes.c
   coreboot-v3/northbridge/amd/k8/incoherent_ht_chain.c
Modified:
   coreboot-v3/northbridge/amd/k8/coherent_ht.c
Log:
Changes to make a get_nodes that can be built into stage1 and (for 
m57sli) add incoherent ht chain support to stage1 as well. 

dbe62 was tested and works i.e. this does no harm.

Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
Acked-by: Ronald G. Minnich <rminnich at gmail.com>



Modified: coreboot-v3/northbridge/amd/k8/coherent_ht.c
===================================================================
--- coreboot-v3/northbridge/amd/k8/coherent_ht.c	2008-10-06 17:13:36 UTC (rev 894)
+++ coreboot-v3/northbridge/amd/k8/coherent_ht.c	2008-10-06 17:14:41 UTC (rev 895)
@@ -1689,17 +1689,6 @@
 	return needs_reset;
 }
 
-/** 
- * get_nodes
- * see page 46 of the BKDG Publication # 26094       Revision: 3.30 Issue Date: February 2006
- * @returns an int containing the number of nodes.
- * The format of the register is 32 bits, and the node count is in bits 4-6
- */
-unsigned int get_nodes(void)
-{
-        return ((pci_conf1_read_config32(PCI_BDF(0, 0x18, 0), NODEID)>>4) & 7) + 1;
-}
-
 int optimize_link_coherent_ht(void)
 {
         int needs_reset = 0;

Copied: coreboot-v3/northbridge/amd/k8/get_nodes.c (from rev 875, coreboot-v3/northbridge/amd/k8/coherent_ht.c)
===================================================================
--- coreboot-v3/northbridge/amd/k8/get_nodes.c	                        (rev 0)
+++ coreboot-v3/northbridge/amd/k8/get_nodes.c	2008-10-06 17:14:41 UTC (rev 895)
@@ -0,0 +1,49 @@
+/*
+ * coherent hypertransport initialization for AMD64 
+ * This file is part of the coreboot project.
+ *
+ * written by Stefan Reinauer <stepan at openbios.org>
+ * (c) 2003-2004 by SuSE Linux AG
+ *
+ * (c) 2004 Tyan Computer
+ *  2004.12 yhlu added support to create routing table dynamically.
+ *          it also support 8 ways too. (8 ways ladder or 8 ways crossbar)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+#include <mainboard.h>
+#include <console.h>
+#include <mtrr.h>
+#include <macros.h>
+#include <spd.h>
+#include <cpu.h>
+#include <msr.h>
+#include <amd/k8/k8.h>
+#include <amd/k8/sysconf.h>
+#include <device/pci.h>
+#include <device/hypertransport_def.h>
+#include <mc146818rtc.h>
+#include <lib.h>
+
+/** 
+ * get_nodes
+ * see page 46 of the BKDG Publication # 26094       Revision: 3.30 Issue Date: February 2006
+ * @returns an int containing the number of nodes.
+ * The format of the register is 32 bits, and the node count is in bits 4-6
+ */
+unsigned int get_nodes(void)
+{
+        return ((pci_conf1_read_config32(PCI_BDF(0, 0x18, 0), NODEID)>>4) & 7) + 1;
+}
+

Copied: coreboot-v3/northbridge/amd/k8/incoherent_ht_chain.c (from rev 875, coreboot-v3/northbridge/amd/k8/incoherent_ht.c)
===================================================================
--- coreboot-v3/northbridge/amd/k8/incoherent_ht_chain.c	                        (rev 0)
+++ coreboot-v3/northbridge/amd/k8/incoherent_ht_chain.c	2008-10-06 17:14:41 UTC (rev 895)
@@ -0,0 +1,98 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2002 Linux Networx
+ * (Written by Eric Biederman <ebiederman at lnxi.com> for Linux Networx)
+ * Copyright (C) 2004 YingHai Lu
+ * Copyright (C) 2008 Ronald G. Minnich <rminnich at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+/*
+ 	This should be done by Eric
+	2004.12 yhlu add multi ht chain dynamically support
+	2005.11 yhlu add let real sb to use small unitid
+*/
+#include <mainboard.h>
+#include <console.h>
+#include <mtrr.h>
+#include <macros.h>
+#include <spd.h>
+#include <cpu.h>
+#include <msr.h>
+#include <amd/k8/k8.h>
+#include <amd/k8/sysconf.h>
+#include <device/pci.h>
+#include <device/hypertransport_def.h>
+#include <mc146818rtc.h>
+#include <lib.h>
+
+int set_ht_link_buffer_count(u8 node, u8 linkn, u8 linkt, unsigned val)
+{
+        u32 dword;
+        u8 link_type;
+	unsigned regpos;
+	u32 bdf;
+
+        /* This works on an Athlon64 because unimplemented links return 0 */
+	regpos = 0x98 + (linkn * 0x20);
+	bdf = PCI_BDF(0,0x18+node,0);
+        dword = pci_conf1_read_config32(bdf, regpos);
+        link_type = dword & 0xff;
+
+        if ( (link_type & 0x7) == linkt ) { /* Coherent Link only linkt = 3, ncoherent = 7*/
+		regpos = 0x90 + (linkn * 0x20);
+        	dword = pci_conf1_read_config32(bdf, regpos );
+
+	        if (dword != val) {
+        	        pci_conf1_write_config32(bdf, regpos, val);
+	                return 1;
+        	}
+	}
+
+        return 0;
+}
+
+int set_ht_link_buffer_counts_chain(u8 ht_c_num, unsigned vendorid,  unsigned val)
+{
+        int reset_needed;
+        u8 i;
+
+        reset_needed = 0;
+
+        for (i = 0; i < ht_c_num; i++) {
+                u32 reg;
+                u8 nodeid, linkn;
+                u8 busn;
+                unsigned devn;
+
+                reg = pci_conf1_read_config32(PCI_BDF(0,0x18,1), 0xe0 + i * 4);
+                if((reg & 3) != 3) continue; // not enabled
+
+                nodeid = ((reg & 0xf0)>>4); // nodeid
+                linkn = ((reg & 0xf00)>>8); // link n
+                busn = (reg & 0xff0000)>>16; //busn
+
+		for(devn = 0; devn < 0x20; devn++) {
+	                reg = pci_conf1_read_config32( PCI_BDF(busn, devn, 0), PCI_VENDOR_ID); //1?
+        	        if ( (reg & 0xffff) == vendorid ) {
+                	        reset_needed |= set_ht_link_buffer_count(nodeid, linkn, 0x07,val);
+				break;
+                	}
+		}
+        }
+
+        return reset_needed;
+}
+





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