[coreboot] v3 updates

[Marc Jones]

ron minnich wrote:
> On Mon, Oct 6, 2008 at 11:59 AM, Myles Watson <mylesgw at gmail.com> wrote:
>> Could you help me understand how we get from this picture from the 8111 data
>> sheet to the serengeti dts?  It looks like to me that the nic and ide
>> portions should be included in the amd8111 dts, not the board dts.  I'm also
>> confused why the ide and nic entries seem to be on the same bus.
>>
> 
> nic and ide are in mainboard dts so we can set control variables.
> 
> v3 is like v2 in that dts topology reflects mainboard topology but
> does also show some detailsof chipset topology.
> 
> nic and ide on same bus? That's my mistake, pure and simple. The
> mainboard dts is wrong.
> 
> We're in the learning phase here on dts for boards like this. We
> understand simple boards like geode boards. This is our first complex
> hierarchy board.
> 

Yes, the mainboard dts is where you want to control this. On many 
platforms the on silicon devices may not be used and disabled.

Marc

-- 
Marc Jones
Senior Firmware Engineer
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mailto:Marc.Jones at amd.com
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