[coreboot] [PATCH] current state of C7 CAR for v3
ron minnich
rminnich at gmail.com
Fri Oct 10 17:40:40 CEST 2008
On Fri, Oct 10, 2008 at 12:25 AM, Corey Osgood <corey.osgood at gmail.com> wrote:
> Sorry for the mailbox flooding, I'm slowly learning to step back and look at
> things before jumping to conclusions. Geode and i586 also have ROM_CODE_SEG
> defined, this didn't, that's why the jump was going to nowhere. Do those
> defines belong in this file, somewhere else, or in Kconfig? Are the i586
> values the same as they should be for c7?
ROM_CODE_SEG is probably the same for all x86 but we did not want to
assume anything.
>
> I'm now getting hung up because XIP_ROM_[SIZE,BASE] isn't defined. Do we
> still need XIP and those defines? Are the value limitations the same as they
> were in v2?
>
XIP, hmm. Those are now called CONFIG_XIP_*. Although what meaning
they have in v3 is questionable to me. I have never used it.
Note the error in this snippet from arch/x86/i586/stage0.S
#if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
/* enable write base caching so we can do execute in place
* on the flash rom.
*/
movl $0x202, %ecx
xorl %edx, %edx
movl $(XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
^^^^^^^^^^^^^^^^^
WRONG NAME!
wrmsr
movl $0x203, %ecx
movl $0x0000000f, %edx
movl $(~(XIP_ROM_SIZE - 1) | 0x800), %eax
wrmsr
#endif /* XIP_ROM_SIZE && XIP_ROM_BASE */
I would LOVE to have the CN7 on V3 for this show:
http://sc08.supercomputing.org/
we always show off coreboot there. Most important is k8, but via would
be nice too.
ron
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