[coreboot] [PATCH] v3: VIA C7 CAR

[Carl-Daniel Hailfinger]

On 11.10.2008 03:51, Corey Osgood wrote:
> On Fri, Oct 10, 2008 at 9:50 PM, Corey Osgood <corey.osgood at gmail.com>wrote:
>
>   
>> On Fri, Oct 10, 2008 at 8:14 PM, Carl-Daniel Hailfinger <
>> c-d.hailfinger.devel.2006 at gmx.net> wrote:
>>
>>     
>>> On 11.10.2008 01:03, ron minnich wrote:
>>>       
>>>> Acked-by: Ronald G. Minnich <rminnich at gmail.com>
>>>>         
>>> Thanks, committed in r915.
>>>
>>>       
>>>> Note that it still won't build if CONFIG_XIP_ROM_{SIZE,BASE} are set
>>>> but I still don't know why we even have CONFIG_XIP in v3 :-)
>>>>
>>>> We can fix this but I'd like to start getting via bits into v3 asap.
>>>>         
>>> Mostly I wanted to give Corey a chance to actually try some code which
>>> should work in theory.
>>>       
>> And work it does:
>>     

Yay! It pays to reread code until no visible bugs or inconsistencies are
left. I shall sell my 690G/SB600 board before I touch it and continue
with "dry" coding. :-P


>> coreboot-3.0.916 Fri Oct 10 21:47:28 EDT 2008 starting...
>> (console_loglevel=8)
>> Choosing fallback boot.
>> LAR: Attempting to open 'fallback/initram/segment0'.
>> LAR: Start 0xfff80000 len 0x80000
>> LAR: seen member normal/option_table at 0xfff80000, size 932
>> LAR: seen member normal/initram/segment0 at 0xfff80400, size 420
>> LAR: seen member normal/stage2/segment0 at 0xfff80600, size 1
>> LAR: seen member normal/stage2/segment1 at 0xfff80660, size 26338
>> LAR: seen member normal/stage2/segment2 at 0xfff86da0, size 6320
>>
>>     
>
> Stupid copy and paste error. I'm going to bed now...
>
> coreboot-3.0.916 Fri Oct 10 21:47:28 EDT 2008 starting...
> (console_loglevel=8)
> Choosing fallback boot.
> LAR: Attempting to open 'fallback/initram/segment0'.
> LAR: Start 0xfff80000 len 0x80000
> LAR: seen member normal/option_table at 0xfff80000, size 932
> LAR: seen member normal/initram/segment0 at 0xfff80400, size 420
> LAR: seen member normal/stage2/segment0 at 0xfff80600, size 1
> LAR: seen member normal/stage2/segment1 at 0xfff80660, size 26338
> LAR: seen member normal/stage2/segment2 at 0xfff86da0, size 6320
> LAR: seen member bootblock at 0xffffafc0, size 20480
> LAR: File not found!
> LAR: Run file fallback/initram/segment0 failed: No such file.
> Fallback failed. Try normal boot
> LAR: Attempting to open 'normal/initram/segment0'.
> LAR: Start 0xfff80000 len 0x80000
> LAR: seen member normal/option_table at 0xfff80000, size 932
> LAR: seen member normal/initram/segment0 at 0xfff80400, size 420
> LAR: CHECK normal/initram/segment0 @ 0xfff80400
> start 0xfff80450 len 420 reallen 420 compression 0 entry 0x00000040
> loadaddress 0x00000000
> Entry point is 0xfff80490
> RAM init code started.
> Nothing to do.
> printktest1: If the immediately preceding line does not say "Nothing to
> do.", then execution did not start at main()
> Trying absolute call from non-_MAINOBJECT XIP code.
> Absolute call successful.
> Done.
> run_file returns with 0
> Done RAM init code
>
>   
>> I'll be getting to ram init tomorrow ;)
>>     

This will be a bit more difficult than you might at first expect. The
following pieces of code are missing:
- CAR disabling (doable, needs input from VIA)
- Stack switching (really hard, but I have some concept in mind that
will work).

However, RAM init itself won't be affected by this. The problems will
start exactly at disable_car() and not before, so although you can rely
on the code working until directly before disable_car(), after that your
image will just crash, burn and/or insult your loved ones.
You can insert a call to some memory test routine before disable_car()
and it will give you reliable results about whether RAM init really worked.


>> Thanks!
>>     

You're welcome. Now it's your turn to shock Ron with some cool RAM init
code. ;-)


Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/