[coreboot] r964 - coreboot-v3/util/x86emu
stepan at coresystems.de
Thu Oct 30 03:06:03 CET 2008
Carl-Daniel Hailfinger wrote:
> On 30.10.2008 01:26, Stefan Reinauer wrote:
>> So, just come up with a better solution for the problem that does not
>> involve using FSEG because that's gone already.
> What about:
> - Keep the shared part of the ROM cached (or even locked in cache) or
> anything that will allow the processor to continue fetching/executing
> code while sizing the BARs.
> - Trap on each option ROM write to a BAR, check if it is sizing related,
> then give back the expected info and leave the BAR untouched. vm86 can
> be trapped easily. For x86emu, we don't even have to trap. That leaves
> our own BAR sizing as a possible problem. As long as we get that one
> right, we win.
> I believe Ron earlier suggested key ingredients of the recipe above, so
> I don't want to take credit for it.
I was just thinking: Since we want to leave option rom init to seabios
living in FSEF after all: We're not calling anything from below 4G
anymore as we're in a different scope. So we wouldn't have to give up on
sharing, and would still get the issue out of the way while removing
lots and lots of code in coreboot.
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