[coreboot] unrv2b delay (v2)

Marc Jones marc.jones at amd.com
Thu Oct 30 23:33:41 CET 2008


Stefan Reinauer wrote:
> On 30.10.2008, at 15:03, Marc Jones <marc.jones at amd.com> wrote:
>>>
>> I think that this is in all K8 and fam10 disable_car code.
>> The copy to memory is probably good. Running from the rom and 
>> decompressing from the rom is going to thrash. It may affect some 
>> cpu/chipset combinations more than others.
>>
>> Marc
>
>
> So what's the reason for that?
off the top of my head:

1. ROM access speed: lpc and or spi may be run at different speeds. 
(faster on some platforms)
2. domain crossed - ht -> maybe pci/pcie -> pci/pcie -> lpc ( less is 
better)
3. prefetch and code alignment. Being a few bytes off can cause and 
prefetching to thrash.

It shouldn't thrash as bad if the ROM is being cached but I am not sure 
that it is or that it is setup correctly.

Marc


-- 
Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:Marc.Jones at amd.com
http://www.amd.com/embeddedprocessors






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