[coreboot] r965 - in coreboot-v3: arch/x86 device doc/design util/x86emu

svn at coreboot.org svn at coreboot.org
Fri Oct 31 18:40:01 CET 2008


Author: rminnich
Date: 2008-10-31 18:40:01 +0100 (Fri, 31 Oct 2008)
New Revision: 965

Modified:
   coreboot-v3/arch/x86/Makefile
   coreboot-v3/device/pci_device.c
   coreboot-v3/doc/design/newboot.lyx
   coreboot-v3/util/x86emu/Makefile
Log:
This is the beginning of support for saving base registers that already have a v
alue. There 
is a known bug in v2/v3 wherein a BAR that is set is ignored. This change will c
ome in very
slowly as it is a bit tricky to get right as we redesign the dev code.

Also make the vm86 stuff use the SRC instead of OBJ names so we can see it in ks
cope. 

Finally, beginnings of documentation changes, not finished yet. 

Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
Acked-by: Stefan Reinauer <stepan at coresystems.de>


Modified: coreboot-v3/arch/x86/Makefile
===================================================================
--- coreboot-v3/arch/x86/Makefile	2008-10-29 20:39:32 UTC (rev 964)
+++ coreboot-v3/arch/x86/Makefile	2008-10-31 17:40:01 UTC (rev 965)
@@ -288,7 +288,7 @@
 
 kscope: $(obj)/mainboard/$(MAINBOARDDIR)/kscope/cscope.files
 	kscope $(obj)/mainboard/$(MAINBOARDDIR)/kscope
-ALLSRC=$(STAGE0_SRC) $(INITRAM_SRC) $(STAGE2_SRC)
+ALLSRC=$(STAGE0_SRC) $(INITRAM_SRC) $(STAGE2_SRC) $(PCIROM_SRC)
 $(obj)/mainboard/$(MAINBOARDDIR)/kscope/cscope.files: $(ALLSRC)
 	$(Q)mkdir -p $(obj)/mainboard/$(MAINBOARDDIR)/kscope
 	$(Q)cp cscope.proj $(obj)/mainboard/$(MAINBOARDDIR)/kscope

Modified: coreboot-v3/device/pci_device.c
===================================================================
--- coreboot-v3/device/pci_device.c	2008-10-29 20:39:32 UTC (rev 964)
+++ coreboot-v3/device/pci_device.c	2008-10-31 17:40:01 UTC (rev 965)
@@ -156,7 +156,7 @@
 struct resource *pci_get_resource(struct device *dev, unsigned long index)
 {
 	struct resource *resource;
-	unsigned long value, attr;
+	unsigned long value, attr, base;
 	resource_t moving, limit;
 
 	/* Initialize the resources to nothing. */
@@ -165,9 +165,15 @@
 	/* Get the initial value. */
 	value = pci_read_config32(dev, index);
 
+	/* save the base address */
+	if (value & PCI_BASE_ADDRESS_SPACE_IO)
+		base &= ~PCI_BASE_ADDRESS_IO_ATTR_MASK;
+	else
+		base &= ~PCI_BASE_ADDRESS_MEM_ATTR_MASK;
+
 	/* See which bits move. */
 	moving = pci_moving_config32(dev, index);
-
+	/* Next step: save the base in the dev struct. For later next week */
 	/* Initialize attr to the bits that do not move. */
 	attr = value & ~moving;
 

Modified: coreboot-v3/doc/design/newboot.lyx
===================================================================
--- coreboot-v3/doc/design/newboot.lyx	2008-10-29 20:39:32 UTC (rev 964)
+++ coreboot-v3/doc/design/newboot.lyx	2008-10-31 17:40:01 UTC (rev 965)
@@ -1,17 +1,25 @@
-#LyX 1.4.4 created this file. For more info see http://www.lyx.org/
-\lyxformat 245
+#LyX 1.5.6 created this file. For more info see http://www.lyx.org/
+\lyxformat 276
 \begin_document
 \begin_header
 \textclass article
 \language english
 \inputencoding default
-\fontscheme default
+\font_roman default
+\font_sans default
+\font_typewriter default
+\font_default_family default
+\font_sc false
+\font_osf false
+\font_sf_scale 100
+\font_tt_scale 100
 \graphics default
 \paperfontsize 10
 \spacing single
 \papersize default
 \use_geometry false
 \use_amsmath 0
+\use_esint 0
 \cite_engine basic
 \use_bibtopic false
 \paperorientation portrait
@@ -24,7 +32,8 @@
 \papersides 1
 \paperpagestyle empty
 \tracking_changes false
-\output_changes true
+\output_changes false
+\author "" 
 \end_header
 
 \begin_body
@@ -144,7 +153,8 @@
 
 \begin_layout Standard
 Shown in 
-\begin_inset LatexCommand \ref{fig:FLASH-layout}
+\begin_inset LatexCommand ref
+reference "fig:FLASH-layout"
 
 \end_inset
 
@@ -194,14 +204,23 @@
 sideways false
 status open
 
-\begin_layout Caption
-\begin_inset LatexCommand \label{fig:FLASH-layout}
+\begin_layout Standard
+\begin_inset Caption
 
+\begin_layout Standard
+\begin_inset LatexCommand label
+name "fig:FLASH-layout"
+
 \end_inset
 
 FLASH layout
 \end_layout
 
+\end_inset
+
+
+\end_layout
+
 \begin_layout Standard
 \begin_inset Graphics
 	filename flashlayout.eps
@@ -225,8 +244,8 @@
 \end_layout
 
 \begin_layout Standard
-The coreboot device tree is probably the single most important concept
- in coreboot, and, in V2, was the least understood part of the software.
+The coreboot device tree is probably the single most important concept in
+ coreboot, and, in V2, was the least understood part of the software.
  The device tree provides a tremendous amount of capability to the software.
  The initial tree, which almost always will be an incomplete representation
  of the hardware (consider pluggable devices), is created by the configuration
@@ -353,9 +372,9 @@
  But, not all devices have identical capabilities.
  Some PCI devices have IDE controllers, others do not; some can drive the
  legacy PC XBUS, others can not; and so on.
- In coreboot V1, we attempted to create devices that were the union of
- all possible devices, but creating such a union proved to be impossible,
- as new devices with new capabilities came out.
+ In coreboot V1, we attempted to create devices that were the union of all
+ possible devices, but creating such a union proved to be impossible, as
+ new devices with new capabilities came out.
  So, in V2, we split off the device-specific information into a seperate
  structure.
  The generic device structure is defined in include/device/device.h; the
@@ -411,11 +430,19 @@
 sideways false
 status open
 
-\begin_layout Caption
+\begin_layout Standard
+\begin_inset Caption
+
+\begin_layout Standard
 The files in the i440bx directory.
  
 \end_layout
 
+\end_inset
+
+
+\end_layout
+
 \begin_layout LyX-Code
 [rminnich at q ~]$ ls ~/src/bios/coreboot-v3/northbridge/intel/i440bxemulation/
  
@@ -453,10 +480,18 @@
 sideways false
 status open
 
-\begin_layout Caption
+\begin_layout Standard
+\begin_inset Caption
+
+\begin_layout Standard
 config.h for the i440bx
 \end_layout
 
+\end_inset
+
+
+\end_layout
+
 \begin_layout LyX-Code
 extern struct chip_operations northbridge_intel_i440bxemulation_ops;
 \end_layout
@@ -922,7 +957,10 @@
 \end_layout
 
 \begin_layout Subparagraph*
-Phase 2 -- preparation for bus scan
+Phase 2 -- fixup.
+ Fix broken devices if needed.
+ Typically used by mainboard device.
+ 
 \end_layout
 
 \begin_layout Standard
@@ -976,10 +1014,18 @@
 sideways false
 status open
 
-\begin_layout Caption
+\begin_layout Standard
+\begin_inset Caption
+
+\begin_layout Standard
 The dts for the emulation/qemu target
 \end_layout
 
+\end_inset
+
+
+\end_layout
+
 \begin_layout LyX-Code
 /{ config="mainboard,emulation,qemu-i386";
 \end_layout
@@ -1017,10 +1063,18 @@
 sideways false
 status open
 
-\begin_layout Caption
+\begin_layout Standard
+\begin_inset Caption
+
+\begin_layout Standard
 Code generated for the dts
 \end_layout
 
+\end_inset
+
+
+\end_layout
+
 \begin_layout LyX-Code
 struct mainboard_emulation_qemu_i386_config root = { .nothing = 1, };
 \end_layout
@@ -1096,10 +1150,18 @@
 sideways false
 status open
 
-\begin_layout Caption
+\begin_layout Standard
+\begin_inset Caption
+
+\begin_layout Standard
 What the mainboard file looks like with enable_dev
 \end_layout
 
+\end_inset
+
+
+\end_layout
+
 \begin_layout LyX-Code
 static void enable_dev(struct device *dev){
 \end_layout
@@ -1433,10 +1495,18 @@
 sideways false
 status open
 
-\begin_layout Caption
+\begin_layout Standard
+\begin_inset Caption
+
+\begin_layout Standard
 Sample DTS
 \end_layout
 
+\end_inset
+
+
+\end_layout
+
 \begin_layout LyX-Code
 /{
 \end_layout
@@ -1635,7 +1705,9 @@
 status collapsed
 
 \begin_layout Standard
-\begin_inset LatexCommand \bibtex[latex8]{yourbibfile}
+\begin_inset LatexCommand bibtex
+options "latex8"
+bibfiles "yourbibfile"
 
 \end_inset
 
@@ -1762,7 +1834,10 @@
 sideways false
 status open
 
-\begin_layout Caption
+\begin_layout Standard
+\begin_inset Caption
+
+\begin_layout Standard
 How we get from the mainboard DTS to C
 \end_layout
 
@@ -1771,6 +1846,11 @@
 
 \end_layout
 
+\end_inset
+
+
+\end_layout
+
 \begin_layout Section
 Makefile targets
 \end_layout
@@ -1946,8 +2026,8 @@
 
 \begin_layout Itemize
 Payload.
- I say something must be included in the coreboot tree or trivially added to a
- tree by download or command.
+ I say something must be included in the coreboot tree or trivially added
+ to a tree by download or command.
  FILO is candidate for inclusion.
  What's up with FILO(EB) and FILO(CB) ? Merge them? Make EB default payload?
  FILO? memtest86? All about making a usable product.
@@ -2122,8 +2202,8 @@
  It will not build in V3, as the includes are wrong.
  We fix these and, while we are at it, change the entry point to be called
  main().
- This file will be a standalone file in the coreboot Lightweight Archive (LAR), and
- hence needs to have main() as the entry point.
+ This file will be a standalone file in the coreboot Lightweight Archive
+ (LAR), and hence needs to have main() as the entry point.
  
 \end_layout
 

Modified: coreboot-v3/util/x86emu/Makefile
===================================================================
--- coreboot-v3/util/x86emu/Makefile	2008-10-29 20:39:32 UTC (rev 964)
+++ coreboot-v3/util/x86emu/Makefile	2008-10-31 17:40:01 UTC (rev 965)
@@ -18,19 +18,23 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-X86EMU_OBJ  = debug.o decode.o fpu.o ops.o ops2.o prim_ops.o sys.o
-BIOSEMU_OBJ = biosemu.o pcbios/pcibios.o
-VM86_OBJ    = vm86.o vm86_gdt.o
+X86EMU_SRC  = debug.c decode.c fpu.c ops.c ops2.c prim_ops.c sys.c
+BIOSEMU_SRC = biosemu.c pcbios/pcibios.c
+VM86_SRC    = vm86.c vm86_gdt.c b.c corebootonly.c
 
 ifeq ($(CONFIG_PCI_OPTION_ROM_RUN_X86EMU),y)
-LIBX86EMU_OBJS = $(patsubst %,$(obj)/util/x86emu/x86emu/%,$(X86EMU_OBJ)) \
-		 $(patsubst %,$(obj)/util/x86emu/%,$(BIOSEMU_OBJ))
+LIBX86EMU_SRC=$(X86EMU_SRC) $(BIOSEMU_SRC)
 endif
 
 ifeq ($(CONFIG_PCI_OPTION_ROM_RUN_VM86),y)
-LIBX86EMU_OBJS := $(patsubst %,$(obj)/util/x86emu/%,$(VM86_OBJ))
+LIBX86EMU_SRC=$(VM86_SRC)
 endif
 
+LIBX86EMU_OBJS = $(patsubst %.c,$(obj)/util/x86emu/%.o,$(LIBX86EMU_SRC))
+# needed for kscope
+PCIROM_SRC += $(patsubst %,$(src)/util/x86emu/%,$(LIBX86EMU_SRC)) 
+
+
 $(obj)/util/x86emu/libx86emu.a: $(LIBX86EMU_OBJS) $(src)/.config
 	$(Q)printf "  AR      $(subst $(shell pwd)/,,$(@))\n"
 	$(Q)rm -f $@ # otherwise we always add to the archive





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