[coreboot] Cache as RAM - is it possible to execute code in cache?
c-d.hailfinger.devel.2006 at gmx.net
Fri Sep 5 17:01:02 CEST 2008
On 05.09.2008 16:50, ron minnich wrote:
> On Fri, Sep 5, 2008 at 2:44 AM, Carl-Daniel Hailfinger
> <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>> Yes and no. At least the new AMD Family 10h processors can't use CAR for
>> data storage and code storage at the same time. In theory, you could
>> fill the CAR area in data storage mode, then switch over to code
>> storage. Not tested, though, and NOT mentioned as viable in the BKDG
>> (BIOS and Kernel Developer's Guide).
> hmm, this will mean a redesign in v3 if true.
Not really. v3 does not try to load any code into the CAR area.
> We count on using CAR for code (initram)
initram is not loaded into the CAR area, it is XIP in the ROM.
Let me rephrase: On Fam10h, it is not possible to _store_ code and
read/write data in a given CAR area. Depending on CAR granularity, you
can designate each part of the CAR area for a different purpose. Example:
CAR as code storage (readonly) from 0xc8000-0xc8fff, CAR as data storage
(read/write) from 0xc9000-0xcffff.
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