[coreboot] r3577 - trunk/coreboot-v2/src/mainboard/jetway/j7f24

[svn at coreboot.org]

Author: hawke
Date: 2008-09-12 22:39:04 +0200 (Fri, 12 Sep 2008)
New Revision: 3577

Modified:
   trunk/coreboot-v2/src/mainboard/jetway/j7f24/Config.lb
Log:
For the jetway jf2/4 series of mainboards:
* change the comment for device f.0 from "IDE" to "SATA"
* turn on firewire device a.0
* turn on pata device f.1
* don't turn on the unusable device 10.5 (built-in vt8237 ethernet?)

Signed-off-by: Alex Mauer <hawke at hawkesnest.net>
Acked-by: Ronald G. Minnich <rminnich at gmail.com>


Modified: trunk/coreboot-v2/src/mainboard/jetway/j7f24/Config.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/jetway/j7f24/Config.lb	2008-09-11 17:44:45 UTC (rev 3576)
+++ trunk/coreboot-v2/src/mainboard/jetway/j7f24/Config.lb	2008-09-12 20:39:04 UTC (rev 3577)
@@ -97,15 +97,16 @@
       # Both cables are 40pin.
       register "ide0_80pin_cable" = "0"
       register "ide1_80pin_cable" = "0"
-      device pci f.0 on end			# IDE
       register "fn_ctrl_lo" = "0x80"
       register "fn_ctrl_hi" = "0x1d"
+      device pci a.0 on end			# Firewire
+      device pci f.0 on end			# SATA
+      device pci f.1 on end			# IDE
       device pci 10.0 on end			# OHCI
       device pci 10.1 on end			# OHCI
       device pci 10.2 on end			# OHCI
       device pci 10.3 on end			# OHCI
       device pci 10.4 on end			# EHCI
-      device pci 10.5 on end			# UDCI
       device pci 11.0 on			# Southbridge LPC
         chip superio/fintek/f71805f		# Super I/O
           device pnp 2e.0 off			# Floppy