[coreboot] [v2] r4182 - in trunk/coreboot-v2/src: include/device southbridge/broadcom southbridge/broadcom/bcm21000

[svn at coreboot.org]

Author: myles
Date: 2009-04-22 22:27:53 +0200 (Wed, 22 Apr 2009)
New Revision: 4182

Added:
   trunk/coreboot-v2/src/southbridge/broadcom/bcm21000/
   trunk/coreboot-v2/src/southbridge/broadcom/bcm21000/Config.lb
   trunk/coreboot-v2/src/southbridge/broadcom/bcm21000/bcm21000_pcie.c
Modified:
   trunk/coreboot-v2/src/include/device/pci_ids.h
Log:
This patch adds support for the BCM21000 (aka HT-2100)
PCIe bridge.

Signed-off-by: Mondrian nuessle <nuessle at uni-hd.de>
Acked-by: Samuel Verstraete <samuel.verstraete at gmail.com>


Modified: trunk/coreboot-v2/src/include/device/pci_ids.h
===================================================================
--- trunk/coreboot-v2/src/include/device/pci_ids.h	2009-04-22 18:16:20 UTC (rev 4181)
+++ trunk/coreboot-v2/src/include/device/pci_ids.h	2009-04-22 20:27:53 UTC (rev 4182)
@@ -1335,6 +1335,10 @@
 #define PCI_DEVICE_ID_BROADCOM_BCM5780_NIC 0x1668
 #define PCI_DEVICE_ID_BROADCOM_BCM5780_NIC1 0x1669
 
+#define PCI_DEVICE_ID_SERVERWORKS_BCM21000_EXB0 0x140
+#define PCI_DEVICE_ID_SERVERWORKS_BCM21000_EXB1 0x142
+#define PCI_DEVICE_ID_SERVERWORKS_BCM21000_EXB2 0x144
+
 #define PCI_DEVICE_ID_SERVERWORKS_BCM5785_HT_PXB 0x0036
 #define PCI_DEVICE_ID_SERVERWORKS_BCM5785_PXBX   0x0104
 #define PCI_DEVICE_ID_SERVERWORKS_BCM5785_SATA         0x024a

Added: trunk/coreboot-v2/src/southbridge/broadcom/bcm21000/Config.lb
===================================================================
--- trunk/coreboot-v2/src/southbridge/broadcom/bcm21000/Config.lb	                        (rev 0)
+++ trunk/coreboot-v2/src/southbridge/broadcom/bcm21000/Config.lb	2009-04-22 20:27:53 UTC (rev 4182)
@@ -0,0 +1 @@
+driver bcm21000_pcie.o

Added: trunk/coreboot-v2/src/southbridge/broadcom/bcm21000/bcm21000_pcie.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/broadcom/bcm21000/bcm21000_pcie.c	                        (rev 0)
+++ trunk/coreboot-v2/src/southbridge/broadcom/bcm21000/bcm21000_pcie.c	2009-04-22 20:27:53 UTC (rev 4182)
@@ -0,0 +1,82 @@
+/*
+ * This file is part of the coreboot project.
+ *
+* Copyright (C) 2009 University of Heidelberg
+ * Written by Mondrian Nuessle <nuessle at uni-heidelberg.de> for University of Heidelberg
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+
+static void pcie_init(struct device *dev)
+{
+
+	/* Enable pci error detecting */
+	uint32_t dword;
+	uint32_t msicap;
+
+	printk_debug("PCIE enable.... dev= %s\n",dev_path(dev));
+
+	/* System error enable */
+	dword = pci_read_config32(dev, 0x04);
+	dword |= (1<<8); /* System error enable */
+	dword |= (1<<30); /* Clear possible errors */
+	pci_write_config32(dev, 0x04, dword);
+
+	/* enable MSI on PCIE: */
+	msicap = pci_read_config32(dev, 0xa0);
+	msicap |= (1<<16); /* enable MSI*/
+	pci_write_config32(dev, 0xa0, msicap);
+}
+
+static struct pci_operations lops_pci = {
+        .set_subsystem = 0,
+};
+
+static struct device_operations pcie_ops  = {
+	.read_resources   = pci_bus_read_resources,
+	.set_resources    = pci_dev_set_resources,
+	.enable_resources = pci_bus_enable_resources,
+	.init             = pcie_init,
+	.scan_bus         = pci_scan_bridge,
+	.reset_bus        = pci_bus_reset,
+	.ops_pci          = &lops_pci,
+};
+
+
+static struct pci_driver pcie_driver1 __pci_driver = {
+	.ops    = &pcie_ops,
+	.vendor = PCI_VENDOR_ID_SERVERWORKS,
+	.device = PCI_DEVICE_ID_SERVERWORKS_BCM21000_EXB0,
+};
+
+static struct pci_driver pcie_driver2 __pci_driver = {
+	.ops    = &pcie_ops,
+	.vendor = PCI_VENDOR_ID_SERVERWORKS,
+	.device = PCI_DEVICE_ID_SERVERWORKS_BCM21000_EXB1,
+};
+
+static struct pci_driver pcie_driver3 __pci_driver = {
+	.ops    = &pcie_ops,
+	.vendor = PCI_VENDOR_ID_SERVERWORKS,
+	.device = PCI_DEVICE_ID_SERVERWORKS_BCM21000_EXB2,
+};
+