[coreboot] [v2] r4222 - in trunk/coreboot-v2/src: mainboard/via/vt8454c northbridge/via/cx700

[svn at coreboot.org]

Author: oxygene
Date: 2009-04-27 22:19:48 +0200 (Mon, 27 Apr 2009)
New Revision: 4222

Modified:
   trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb
   trunk/coreboot-v2/src/mainboard/via/vt8454c/mainboard.c
   trunk/coreboot-v2/src/northbridge/via/cx700/northbridge.c
Log:
Add high table support to via vt8454c.

Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>
Acked-by: Myles Watson <mylesgw at gmail.com>


Modified: trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb	2009-04-27 20:19:06 UTC (rev 4221)
+++ trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb	2009-04-27 20:19:48 UTC (rev 4222)
@@ -25,6 +25,9 @@
 uses HAVE_ACPI_TABLES
 uses HAVE_OPTION_TABLE
 uses USE_OPTION_TABLE
+uses HAVE_LOW_TABLES
+uses HAVE_HIGH_TABLES
+uses HAVE_MAINBOARD_RESOURCES
 
 uses USE_FALLBACK_IMAGE
 uses HAVE_FALLBACK_BOOT
@@ -139,7 +142,14 @@
 ##
 default HAVE_OPTION_TABLE=1
 
+##
+## Build code to fill in tables both in low and high memory
+##
+default HAVE_LOW_TABLES=1
+default HAVE_HIGH_TABLES=1
+default HAVE_MAINBOARD_RESOURCES=1
 
+
 ##
 ## Build code to setup a generic IOAPIC
 ##

Modified: trunk/coreboot-v2/src/mainboard/via/vt8454c/mainboard.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/via/vt8454c/mainboard.c	2009-04-27 20:19:06 UTC (rev 4221)
+++ trunk/coreboot-v2/src/mainboard/via/vt8454c/mainboard.c	2009-04-27 20:19:48 UTC (rev 4222)
@@ -20,8 +20,23 @@
  */
 
 #include <device/device.h>
+#include <boot/tables.h>
+#include <console/console.h>
 #include "chip.h"
 
+/* in arch/i386/boot/tables.c */
+extern uint64_t high_tables_base, high_tables_size;
+
+int add_mainboard_resources(struct lb_memory *mem)
+{
+#if HAVE_HIGH_TABLES == 1
+        printk_debug("Adding high table area\n");
+        lb_add_memory_range(mem, LB_MEM_TABLE,
+                high_tables_base, high_tables_size);
+#endif
+	return 0;
+}
+
 struct chip_operations mainboard_ops = {
 	CHIP_NAME("VIA VT8454c Mainboard")
 };

Modified: trunk/coreboot-v2/src/northbridge/via/cx700/northbridge.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/via/cx700/northbridge.c	2009-04-27 20:19:06 UTC (rev 4221)
+++ trunk/coreboot-v2/src/northbridge/via/cx700/northbridge.c	2009-04-27 20:19:48 UTC (rev 4222)
@@ -87,6 +87,12 @@
 	return tolm;
 }
 
+#if HAVE_HIGH_TABLES==1
+/* maximum size of high tables in KB */
+#define HIGH_TABLES_SIZE 64
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
 static void pci_domain_set_resources(device_t dev)
 {
 	device_t mc_dev;
@@ -117,6 +123,12 @@
 	else
 		tomk = (((rambits << 6) - (4 << reg) - 1) * 1024);
 
+#if HAVE_HIGH_TABLES == 1
+	high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+	high_tables_size = HIGH_TABLES_SIZE* 1024;
+	printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+#endif
+
 	/* Compute the top of Low memory */
 	tolmk = pci_tolm >> 10;
 	if (tolmk >= tomk) {