[coreboot] vga not working

Arnaud Maye arnaud.maye at 4dsp.com
Mon Aug 17 19:49:27 CEST 2009


Okay, so actually we are talking about the PCIe Port (PEA) peripheral in 
the ep80579. So actually
a source file for it is already in the repo as Myles pointed out earlier:

northbridge\intel\i3100\pciexp_porta.c

The PCIe portA can be either x8 (PEA) or in double x8 (PEA0 and PEA1). 
In the
truxton case PEA0 connects to PCIe SLOT0. PEA1 connects to a PCIe switch.
This switch (PEX8508) provides x1 to PCIe Slot0 to Slot1.

The BCTRL ( Bridge Control Register ) has the VGAEN bit. PEA0 or PEA1
can have VGAEN enabled but not both in fact.

So actually if a VGA peripheral is found on PEA0 (00.02.00) we set 
PEA0:BCTRL.VGAEN.
If a VGA peripheral is found on PEA1 (00.03.00) we set PEA1:BCTRL.VGAEN.

Ideally we want this to operate with the card connected where the card 
is actually connected to.

Thanks,

Arnaud

 








ron minnich wrote:
> On Mon, Aug 17, 2009 at 9:12 AM, Myles Watson<mylesgw at gmail.com> wrote:
>
>   
>> For me the steps would be:
>> 1. Make sure that the device that needs the config writes is in the above
>> list.
>>     
>
> I am after painful detail :-)
>
> So, what is the name of this device? src/northbridge/...
>
>
>   
>> 2. Add code like this:
>>      if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
>>           /* Add your code from auto.c here */
>>      }
>> to the .init function of the bridge.
>>     
>
> Yes. And how did bridge_ctrl get set again?
>
>   
>> For example, assuming that the i3100 PCIe port needs the configuration, I
>> would add the code in:
>>
>> src/northbridge/intel/i3100/pciexp_porta.c
>>
>> In the existing pcie_init function.
>>     
>
> precisely, but let's drill down just a bit more, but only once we get
> Arnaud into the discussion :-)
>
> ron
>
>   


*
*




More information about the coreboot mailing list