[coreboot] [v2] r4591 - trunk/coreboot-v2/src/southbridge/amd/sb600

svn at coreboot.org svn at coreboot.org
Thu Aug 27 06:30:47 CEST 2009


Author: hailfinger
Date: 2009-08-27 06:30:47 +0200 (Thu, 27 Aug 2009)
New Revision: 4591

Modified:
   trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c
Log:
The new resource allocator helped me find a bug in SB600 diagnostics.
The SB600 SATA code printed that two BARs had the same address because
it didn't mask the correct number of bits in the BAR.
Functionality was not affected, but the debug output was incorrect.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Zheng Bao <zheng.bao at amd.com>


Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c	2009-08-27 02:47:35 UTC (rev 4590)
+++ trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c	2009-08-27 04:30:47 UTC (rev 4591)
@@ -86,10 +86,10 @@
 	/* get base addresss */
 	sata_bar5 = (u8 *) (pci_read_config32(dev, 0x24) & ~0x3FF);
 	sata_bar0 = pci_read_config16(dev, 0x10) & ~0x7;
-	sata_bar1 = pci_read_config16(dev, 0x14) & ~0x7;
+	sata_bar1 = pci_read_config16(dev, 0x14) & ~0x3;
 	sata_bar2 = pci_read_config16(dev, 0x18) & ~0x7;
-	sata_bar3 = pci_read_config16(dev, 0x1C) & ~0x7;
-	sata_bar4 = pci_read_config16(dev, 0x20) & ~0x7;
+	sata_bar3 = pci_read_config16(dev, 0x1C) & ~0x3;
+	sata_bar4 = pci_read_config16(dev, 0x20) & ~0xf;
 
 	printk_spew("sata_bar0=%x\n", sata_bar0);	/* 3030 */
 	printk_spew("sata_bar1=%x\n", sata_bar1);	/* 3070 */





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