[coreboot] Problems porting H8dmr_fam10 to H8qme-2+

Myles Watson mylesgw at gmail.com
Tue Dec 22 19:51:04 CET 2009


On Tue, Dec 22, 2009 at 11:38 AM, Knut Kujat <knuku at gap.upv.es> wrote:

>  Myles Watson escribió:
>
>
>
> On Tue, Dec 22, 2009 at 9:22 AM, Knut Kujat <knuku at gap.upv.es> wrote:
>
>> Hello,
>>
>> as Myles suggested to disable siblings to see if I can pass through this
>> weird exception and the impossibility  to do so because of the compile error
>> I changed the physical cpu option to 1 and it worked! But increasing it back
>> to 2 or 4 made the exception come back again.
>> I told you, Myles, I increased stack size to 4000 that was a filthy lie
>> because I thought I'm increasing it to 4000 what I didn't see was that the
>> same option was repeated at the end of the Options.lb file with
>> STACK_SIZE=8000
>>
> It's always good to check targets/vendor/board/build/fallback/ldoptions to
> see what's really being used.
>
>
>> (So I don't know  why the printks started working). Now fooling around
>> with stack size and setting it up to 10000 all 4 cpus started working and I
>> got a grub menu :) in text mode :( so I have a graphics Initializing faild
>> and Linux doesn't boot up completly.
>>
> Great.  I think we're getting to where we should add your board to the
> tree.  Then we can see the device tree too.
>
> I attached it.
>
>
>
>> I attached a complete log file, it is not so complete because the first
>> lines of linux boot up are missing because I had to change serial speed on
>> minicom. Thats because I'm having trouble of setting a speed and getting a
>> total different one.
>>
>> Now I thing that my device tree is not completely working and thats why
>> linux got some collusion at the beginning ??
>>
> It device 0:02.3 isn't getting a driver.  1:06.0 is not found.
>
> PCI: 08:01.0 Hypertransport link capability not foundPCI: pci_scan_bus for
> bus 08
>
> That doesn't look good.
>
> PCI: Left over static devices:
> PCI: 08:01.0
> PCI: 08:01.1
> PCI: 08:02.0
>
>
>
>
>        device pci_domain 0 on
>                chip northbridge/amd/amdfam10 #mc0
>                        device pci 18.0 on end
>                        device pci 18.0 on end
>                        device pci 18.0 on      # SB on link 2.0
>
So it really is on link 2?  I forgot that these boards like to be different.


>                                chip southbridge/nvidia/mcp55
>                                        device pci 0.0 on end   # HT
>                                        device pci 1.0 on # LPC
>


>                                        device pci 2.0 on end # USB 1.1
>                                        device pci 2.1 on end # USB 2
>                                        device pci 4.0 on end # IDE
>                                        device pci 5.0 on end # SATA 0
>                                        device pci 5.1 on end # SATA 1
>                                        device pci 5.2 on end # SATA 2
>                                        device pci 6.0 on  # PCI
>

This device should be removed.

>                          device pci 6.0 on end
>


>
>            end
>                                        device pci 6.1 off end # AZA
>                                        #device pci 8.0 on end # NIC
>                                        #device pci 9.0 on end # NIC
>                                        device pci a.0 on  end # PCI E 5
>                                                #device pci 0.0 on #nec
> pci-x
>                                                #end
>                                                #device pci 0.1 on #nec
> pci-x
>                                                #       device pci 4.0 on
> end #scsi
>                                                #       device pci 4.1 on
> end #scsi
>                                                #end
>                                        #ind
>                                        device pci b.0 on end # PCI E 4
>                                        device pci c.0 on end # PCI E 3
>                                        device pci d.0 on end # PCI E 2
>                                        device pci e.0 on end # PCI E 1
>                                        device pci f.0 on end # PCI E 0
>                                        register "ide0_enable" = "1"
>                                        register "sata0_enable" = "1"
>                                        register "sata1_enable" = "1"
>                                        register "mac_eeprom_smbus" = "3" #
> 1: smbus under 2e.8, 2: SM0 3: SM1
>                                        register "mac_eeprom_addr" = "0x51"
>                                end
>                        end #  device pci 18.0
>                        device pci 18.1 on end
>                        device pci 18.2 on end
>                        device pci 18.3 on end
>                        device pci 18.4 on end
>                        device pci 19.0 on end
>      device pci 19.0 on end
>                  device pci 19.0 on
>                       chip southbridge/amd/amd8132
>                                  device pci 1.0 on end
>                                  device pci 1.1 on end
>                                  device pci 2.0 on
>                                        device pci 3.0 on end
>                                        device pci 3.1 on end
>                                  end
>                       end #amd8132
>
>      end #device pci 19.0
>                        device pci 19.1 on end
>                        device pci 19.2 on end
>                        device pci 19.3 on end
>                        device pci 19.4 on end
>
These should be found automatically, so you can remove them.


>      device pci 1a.0 on end #link 0
>      device pci 1a.0 on end #link 1
>      device pci 1a.0 on end #link 2
>      device pci 1a.1 on end
>      device pci 1a.2 on end
>      device pci 1a.3 on end
>      device pci 1a.4 on end
>      device pci 1b.0 on end #link 0
>      device pci 1b.0 on end #link 1
>      device pci 1b.0 on end #link 2
>      device pci 1b.1 on end
>      device pci 1b.2 on end
>      device pci 1b.3 on end
>      device pci 1b.4 on end
>


>                end # mc0
>
>        end # PCI domain
>

This would be easier to do in a different editor and if it were indented
correctly.  Is there a reason not to check it in?

In your log I noticed that Linux was doing a fast boot.  Does that mean that
it skips some initialization?

Thanks,
Myles
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