[coreboot] [PATCH 2/2] AMD boards to use new Power Now infrastructure
r.marek at assembler.cz
Thu Feb 19 09:39:42 CET 2009
The scope question was answered by Myles already.
> And your code shows one processor, the original code shows four
> processors (I have one single-core CPU).
I choose to generate the code just for cores which exists.
> It seems that your code also fixes the message "powernow-k8: ph2 null
> fid transition 0xa", but I am not sure whether this is an artifact of my
> testing setup.
It imho says that it is already there. Quite harmless messages.
> I tested switching from maximum powersave to maximum performance in a
> tight loop (0.1 seconds delay between state changes) and it survived 262
> changes in each direction. After that, I stopped the test because it
> seemed to work.
Well this change just tables not the chipset setup, but it is fine that it works.
> If you are sure that your code can handle multicore/multiprocessor
> constellations and if you can explain that additional backslash before
> _PR, the patch is
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Committed revision 3955.
> Attached are acpidumps and bootlogs without and with your patch.
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