[coreboot] r3864 - trunk/coreboot-v2/src/southbridge/amd/sb600

svn at coreboot.org svn at coreboot.org
Thu Jan 15 03:35:30 CET 2009


Author: stuge
Date: 2009-01-15 03:35:30 +0100 (Thu, 15 Jan 2009)
New Revision: 3864

Modified:
   trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c
Log:
Adds a retry/faildown to SB600 SATA detection logic.

SATA port status kept returning 0x1: BAR5+po+28h
1h = Device presence detected but Phy communication not established

This patch adds logic to force 1.5g if the drive fails to communicate at 3.0g.

Signed-off-by: Dan Lykowski <lykowdk at gmail.com>
Acked-by: Peter Stuge <peter at stuge.se>


Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c	2009-01-15 02:21:27 UTC (rev 3863)
+++ trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c	2009-01-15 02:35:30 UTC (rev 3864)
@@ -175,6 +175,35 @@
 		byte = readb(sata_bar5 + 0x128 + 0x80 * i);
 		printk_spew("SATA port %i status = %x\n", i, byte);
 		byte &= 0xF;
+
+		if( byte == 0x1 ) {
+			/* If the drive status is 0x1 then we see it but we aren't talking to it. */
+			/* Try to do something about it. */
+			printk_spew("SATA device detected but not talking. Trying lower speed.\n");
+
+			/* Read in Port-N Serial ATA Control Register */
+			byte = readb(sata_bar5 + 0x12C + 0x80 * i);
+
+			/* Set Reset Bit and 1.5g bit */
+			byte |= 0x11; 
+			writeb(byte, (sata_bar5 + 0x12C + 0x80 * i));
+			
+			/* Wait 1ms */			
+			mdelay(1); 
+
+			/* Clear Reset Bit */
+			byte &= ~0x01; 
+			writeb(byte, (sata_bar5 + 0x12C + 0x80 * i));
+
+			/* Wait 1ms */
+			mdelay(1);
+
+			/* Reread status */
+			byte = readb(sata_bar5 + 0x128 + 0x80 * i);
+			printk_spew("SATA port %i status = %x\n", i, byte);
+			byte &= 0xF;
+		}
+
 		if (byte == 0x3) {
 			for (j = 0; j < 10; j++) {
 				if (!sata_drive_detect(i, ((i / 2) == 0) ? sata_bar0 : sata_bar2))





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