[coreboot] MTRR setup strategy

Stefan Reinauer stepan at coresystems.de
Sun Jan 25 00:43:03 CET 2009


On 24.01.2009 23:21 Uhr, Carl-Daniel Hailfinger wrote:
> On 24.01.2009 20:58, Stefan Reinauer wrote:
>   
>> Carl-Daniel Hailfinger wrote:
>>   
>>     
>>> Example:
>>> We want to cache 0MB - (2G-64M-64k).
>>>   
>>>     
>>>       
>> Where do the 64k come from?
>>   
>>     
>
> That was specific to Jason's setup. IIRC the 64k were ACPI memory or
> somesuch.
>   

Any reason why that shouldn't be cachable?



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