[coreboot] fam10/h8dmr: extreme slowness in CBFS memset /memcpy

Myles Watson mylesgw at gmail.com
Tue Jul 21 16:23:22 CEST 2009


> On Tue, Jul 21, 2009 at 06:25:38AM -0600, Myles Watson wrote:
> > > Following up on this - Patrick helped in IRC this evening, and we came
> to
> > > the
> > > conclusion that it's probably *not* an MTRR issue, since we figured
> out
> > > the
> > > code seems to set MTRRs properly.
> > I wonder what else could cause it to be so slow?  It's especially
> surprising
> > for the memset, which is pretty simple.  Does it use movnti for that?
> 
> It's actually just a plain byte-by-byte assignment in c, see
> src/lib/memset.c.
It would be interesting to see if you make it 4 bytes at a time if it is 4x
faster.

> > > We found out after adding an extra MTRR over the flash chip, which did
> not
> > > change anything.
> >
> > Did you disable and re-enable the cache so that the settings take
> effect?
> 
> Hmm, we tried adding it here
> 
>   src/cpu/amd/car/clear_init_ram.c
> 
> in function set_init_ram_access, which already sets an mtrr.
I always wondered about that one.

The thing that makes it hard to debug is that it will read back correctly
even if it hasn't taken effect.

> Thanks - will see if I can try some of these things.
Good luck,
Myles





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