[coreboot] [PATCH]es: Use CBFS on amd/serengeti_cheetah and iwill/dk8_htx

[Patrick Georgi]

Hi,

the attached patches can serve as an example on how to port boards that make 
use of our "failover"-infrastructure to CBFS.

1. Set FALLBACK_SIZE to ROM_IMAGE_SIZE

2. Set ROM_IMAGE_SIZE so that
FAILOVER_SIZE + ROM_IMAGE_SIZE = XIP_ROM_SIZE
to avoid problems with XIP.

3. Enable CONFIG_CBFS (of course)

4. Drop
ldscript /arch/i386/init/ldscript_apc.lb
from the board's Config.lb - coreboot_apc is in CBFS now.

5. Drop most size definitions in targets/*/*/Config*lb except
ROM_SIZE (if it differs from the board's default) and the size configuration 
of the failover image.

The patches are
Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>
and are build tested.
serengeti_cheetah survived in simnow, so it's boot tested.


Regards,
Patrick
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