[coreboot] Flashrom support for EPIA-N(L) - patch for review

Harrison, Jon (SELEX GALILEO, UK) jon.harrison at selexgalileo.com
Wed Jun 17 18:41:59 CEST 2009


Bari/Folks,

I've run the extra tests::

./flashrom -m via:epia-n -E
./flashrom -m via:epia-n -r empty.dd
hexdump -C empty.dd (returns 0xff bytes as expected)
dd if=/dev/urandom of=rnd.dd bs=1024 count=512
./flashrom -m via:epia-n -w rnd.dd
./flashrom -m via:epia-n -v rnd.dd

All works OK and the good image goes back in OK too.

Jon

-----Original Message-----
From: bari [mailto:bari at onelabs.com] 
Sent: 17 June 2009 16:43
To: Harrison, Jon (SELEX GALILEO, UK)
Cc: coreboot at coreboot.org
Subject: Re: [coreboot] Flashrom support for EPIA-N(L) - patch for
review

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Jon,

Just to be certain do:  ./flashrom -r empty.dd' and them 'hexdump -C 
empty.dd', which should return only 0xff bytes.

Also write an image consisting of random bytes (if you have an extra 
device or biosavior, etc. to recover with), then verify it with -v:

dd if=/dev/urandom of=rnd.dd bs=1024c count=512
./flashrom -w rnd.dd
./flashrom -v rnd.dd

If this verifies OK, you can then write your good BIOS image back to the

device.

-Bari

Harrison, Jon (SELEX GALILEO, UK) wrote:
> Hi Guys,
> 
> See below patch for flashrom to add support for EPIA-N(L) Programming.
> 
> This has been built against R599 and tested for read, write and verify
> on an EPIA-NL 800
> 
> Seems to work for me!
> 
> Regards,
> Jon
> 
> 
>  Index: util/flashrom/board_enable.c
> ===================================================================
> --- util/flashrom/board_enable.c	(revision 599)
> +++ util/flashrom/board_enable.c	(working copy)
> @@ -270,6 +270,44 @@
>  }
>  
>  /**
> + * Suited for VIAs EPIA N & NL.
> + */
> +static int board_via_epia_n(const char *name)
> +{
> +	struct pci_dev *dev;
> +	uint16_t base;
> +	uint8_t val;
> +
> +	dev = pci_dev_find(0x1106, 0x3227);	/* VT8237R ISA bridge */
> +	if (!dev) {
> +		fprintf(stderr, "\nERROR: VT8237R ISA bridge not
> found.\n");
> +		return -1;
> +	}
> +
> +	/* All memory cycles, not just ROM ones, go to LPC */
> +	val = pci_read_byte(dev, 0x59);
> +	val &= ~0x80;
> +	pci_write_byte(dev, 0x59, val);
> +	
> +	/* GPIO9 -> output */
> +	val = pci_read_byte(dev, 0xE4);
> +	//printf("GPO Pin Select Reg = 0x%02X\n", val);
> +	val |= 0x20;
> +	pci_write_byte(dev, 0xE4, val);
> +
> +	/* Get Power Management IO address. */
> +	base = pci_read_word(dev, 0x88) & 0xFF80;
> +
> +	/* Enable GPIO9 which is connected to write protect. */
> +	val = INB(base + 0x4D);
> +	//printf("PMM GPIO = 0x%02X\n", val);
> +	val |= 0x02;
> +	OUTB(val, base + 0x4D);
> +
> +	return 0;
> +}
> +
> +/**
>   * Suited for EPoX EP-8K5A2 and Albatron PM266A.
>   */
>  static int board_epox_ep_8k5a2(const char *name)
> @@ -718,6 +756,7 @@
>  	{0x8086, 0x1076, 0x8086, 0x1176,  0x1106, 0x3059, 0x10f1,
> 0x2498, NULL,         NULL,          "Tyan",        "S2498 (Tomcat
> K7M)", board_asus_a7v8x_mx},
>  	{0x1106, 0x0314, 0x1106, 0xaa08,  0x1106, 0x3227, 0x1106,
> 0xAA08, NULL,         NULL,          "VIA",         "EPIA-CN",
> board_via_epia_sp},
>  	{0x1106, 0x3177, 0x1106, 0xAA01,  0x1106, 0x3123, 0x1106,
> 0xAA01, NULL,         NULL,          "VIA",         "EPIA M/MII/...",
> board_via_epia_m},
> +	{0x1106, 0x0259, 0x1106, 0xaa08,  0x1106, 0x3227, 0x1106,
> 0xAA08, "via",        "epia-n",      "VIA",         "EPIA-N/NL",
> board_via_epia_n},
>  	{0x1106, 0x3227, 0x1106, 0xAA01,  0x1106, 0x0259, 0x1106,
> 0xAA01, NULL,         NULL,          "VIA",         "EPIA SP",
> board_via_epia_sp},
>  	{0x1106, 0x5337, 0x1458, 0xb003,  0x1106, 0x287e, 0x1106,
> 0x337e, "via",        "pc3500g",     "VIA",         "PC3500G",
> it87xx_probe_spi_flash},
>  	{     0,      0,      0,      0,       0,      0,      0,
> 0, NULL,         NULL,          NULL,          NULL,
> NULL}, /* end marker */
> SELEX Sensors and Airborne Systems Limited
> Registered Office: Sigma House, Christopher Martin Road, Basildon,
Essex SS14 3EL
> A company registered in England & Wales.  Company no. 02426132
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